| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/ |
| H A D | rockchip,codec-digital.txt | 1 * Rockchip Codec Digital Interface
5 - compatible: should be one of the following
6 - "rockchip,codec-digital-v1"
7 - "rockchip,rk3568-codec-digital"
8 - "rockchip,rk3588-codec-digital"
9 - "rockchip,rv1106-codec-digital"
10 - "rockchip,rv1126-codec-digital"
11 - reg: physical base address of the controller and length of memory mapped
13 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
14 - clock-names: clock names.
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| H A D | nvidia,tegra20-ac97.txt | 4 - compatible : "nvidia,tegra20-ac97"
5 - reg : Should contain AC97 controller registers location and length
6 - interrupts : Should contain AC97 interrupt
7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
10 - ac97
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
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| H A D | rockchip,rk3308-codec.txt | 1 * Rockchip RK3308 Internal Codec
5 - compatible: "rockchip,rk3308-codec"
6 - reg: The physical base address of the controller and length of memory
8 - rockchip,grf: The phandle of the syscon node for GRF register.
9 - clocks: A list of phandle + clock-specifer pairs, one for each entry in
10 clock-names.
11 - clock-names: It should be "acodec".
12 - resets : Must contain an entry for each entry in reset-names.
13 - reset-names : Must include the following entries: "acodec-reset".
16 - rockchip,enable-all-adcs: This is a boolean type property, that shows whether
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| H A D | tlv320aic3x.txt | 1 Texas Instruments - tlv320aic3x Codec module
7 - compatible - "string" - One of:
8 "ti,tlv320aic3x" - Generic TLV320AIC3x device
9 "ti,tlv320aic33" - TLV320AIC33
10 "ti,tlv320aic3007" - TLV320AIC3007
11 "ti,tlv320aic3106" - TLV320AIC3106
12 "ti,tlv320aic3104" - TLV320AIC3104
15 - reg - <int> - I2C slave address
20 - reset-gpios - GPIO specification for the active low RESET input.
21 - ai3x-gpio-func - <array of 2 int> - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality
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| H A D | tlv320aic31xx.txt | 1 Texas Instruments - tlv320aic31xx Codec module
7 - compatible - "string" - One of:
8 "ti,tlv320aic310x" - Generic TLV320AIC31xx with mono speaker amp
9 "ti,tlv320aic311x" - Generic TLV320AIC31xx with stereo speaker amp
10 "ti,tlv320aic3100" - TLV320AIC3100 (mono speaker amp, no MiniDSP)
11 "ti,tlv320aic3110" - TLV320AIC3110 (stereo speaker amp, no MiniDSP)
12 "ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP)
13 "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
14 "ti,tlv320dac3100" - TLV320DAC3100 (no ADC, mono speaker amp, no MiniDSP)
15 "ti,tlv320dac3101" - TLV320DAC3101 (no ADC, stereo speaker amp, no MiniDSP)
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| H A D | rt5677.txt | 1 RT5677 audio CODEC
7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
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| H A D | cs42l52.txt | 1 CS42L52 audio CODEC
5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
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| H A D | cs35l32.txt | 1 CS35L32 audio CODEC
5 - compatible : "cirrus,cs35l32"
7 - reg : the I2C address of the device for I2C. Address is determined by the level
10 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
16 deasserted before communication to the codec starts.
18 - cirrus,boost-manager : Boost voltage control.
19 0 = Automatically managed. Boost-converter output voltage is the higher
21 1 = Automatically managed irrespective of audio, adapting for low-power
22 dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode
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| H A D | rt5659.txt | 1 RT5659/RT5658 audio CODEC
7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
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| H A D | st,sta32x.txt | 1 STA32X audio CODEC
7 - compatible: "st,sta32x"
8 - reg: the I2C address of the device for I2C
9 - reset-gpios: a GPIO spec for the reset pin. If specified, it will be
10 deasserted before communication to the codec starts.
12 - power-down-gpios: a GPIO spec for the power down pin. If specified,
13 it will be deasserted before communication to the codec
16 - Vdda-supply: regulator spec, providing 3.3V
17 - Vdd3-supply: regulator spec, providing 3.3V
18 - Vcc-supply: regulator spec, providing 5V - 26V
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| H A D | qcom,wcd934x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bindings for Qualcomm WCD9340/WCD9341 Audio Codec
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
28 description: GPIO spec for reset line to use
31 slim-ifc-dev: true
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| H A D | ti,pcm3168a.txt | 3 This driver supports both SPI and I2C bus access for this codec
7 - compatible: "ti,pcm3168a"
9 - clocks : Contains an entry for each entry in clock-names
11 - clock-names : Includes the following entries:
14 - VDD1-supply : Digital power supply regulator 1 (+3.3V)
16 - VDD2-supply : Digital power supply regulator 2 (+3.3V)
18 - VCCAD1-supply : ADC power supply regulator 1 (+5V)
20 - VCCAD2-supply : ADC power supply regulator 2 (+5V)
22 - VCCDA1-supply : DAC power supply regulator 1 (+5V)
24 - VCCDA2-supply : DAC power supply regulator 2 (+5V)
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| H A D | cs4270.txt | 1 CS4270 audio CODEC
7 - compatible : "cirrus,cs4270"
9 - reg : the I2C address of the device for I2C
13 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
14 deasserted before communication to the codec starts.
18 codec: cs4270@48 {
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| H A D | qcom,wcd9335.txt | 1 QCOM WCD9335 Codec
3 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports
5 the MSM8996, MSM8976, and MSM8956 chipsets. It has in-built
11 - compatible:
21 - reg
26 - interrupts
28 Value type: <prop-encoded-array>
31 - interrupt-names:
37 - reset-gpios:
40 Definition: Reset gpio line
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| /OK3568_Linux_fs/u-boot/drivers/sound/ |
| H A D | max98095.c | 2 * max98095.c -- MAX98095 ALSA SoC Audio driver
67 * @return int value 0 for success, -1 in case of error.
77 return -1; in max98095_i2c_read()
86 * @param reg codec register
90 * @return int value 0 for success, non-zero error code.
99 return -1; in max98095_update_bits()
111 * codec mclk clock divider coefficients based on sampling rate
130 return -1; in rate_value()
140 * @return -1 for error and 0 Success.
174 return -1; in max98095_hw_params()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/ |
| H A D | allwinner,sun8i-a23-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun8i-a23-prcm
23 "^.*(clk|rst|codec).*$":
29 - fixed-factor-clock
30 - allwinner,sun8i-a23-apb0-clk
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| /OK3568_Linux_fs/kernel/include/linux/mfd/madera/ |
| H A D | pdata.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2015-2018 Cirrus Logic
12 #include <linux/regulator/arizona-ldo1.h>
13 #include <linux/regulator/arizona-micsupp.h>
15 #include <sound/madera-pdata.h>
26 * struct madera_pdata - Configuration data for Madera devices
28 * @reset: GPIO controlling /RESET (NULL = none)
34 * Documentation/driver-api/pinctl.rst)
38 * in the datasheet for the available values for your codec)
39 * @codec: Substruct of pdata for the ASoC codec driver
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| /OK3568_Linux_fs/kernel/sound/soc/tegra/ |
| H A D | tegra20_ac97.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_ac97.c - Tegra20 AC97 platform driver
33 #define DRV_NAME "tegra20-ac97"
42 /* reset line is not driven by DAC pad group, have to toggle GPIO */ in tegra20_ac97_codec_reset()
43 gpio_set_value(workdata->reset_gpio, 0); in tegra20_ac97_codec_reset()
46 gpio_set_value(workdata->reset_gpio, 1); in tegra20_ac97_codec_reset()
52 regmap_read(workdata->regmap, TEGRA20_AC97_STATUS1, &readback); in tegra20_ac97_codec_reset()
65 * although sync line is driven by the DAC pad group warm reset using in tegra20_ac97_codec_warm_reset()
69 gpio_request(workdata->sync_gpio, "codec-sync"); in tegra20_ac97_codec_warm_reset()
71 gpio_direction_output(workdata->sync_gpio, 1); in tegra20_ac97_codec_warm_reset()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
14 Smart CODEC and Amp devices. It allows the connection of most Cirrus
15 Logic devices on mini-cards, as well as allowing connection of various
26 [2] Pinctrl: ../pinctrl/pinctrl-bindings.txt
29 [3] include/dt-bindings/pinctrl/lochnagar.h
37 - cirrus,lochnagar-pinctrl
39 gpio-controller: true
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| /OK3568_Linux_fs/kernel/sound/pcmcia/vx/ |
| H A D | vxp_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
41 return chip->port + vxp_reg_offset[reg]; in vxp_reg_addr()
45 * snd_vx_inb - read a byte from the register
54 * snd_vx_outb - write a byte on the register
73 * vx_check_magic - check the magic word on xilinx
88 return -EIO; in vx_check_magic()
93 * vx_reset_dsp - reset the DSP
102 /* set the reset dsp bit to 1 */ in vxp_reset_dsp()
103 vx_outb(chip, CDSP, chip->regCDSP | VXP_CDSP_DSP_RESET_MASK); in vxp_reset_dsp()
106 /* reset the bit */ in vxp_reset_dsp()
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| /OK3568_Linux_fs/kernel/sound/soc/codecs/ |
| H A D | cs4271.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * CS4271 ASoC codec driver
7 * This driver support CS4271 codec being master or slave, working
9 * The data format accepted is I2S or left-justified.
132 * Default CS4271 power-up configuration
133 * Array contains non-existing in hw register at address 0
134 * Array do not include Chip ID, as codec driver does not use
161 /* Current sample rate for de-emphasis control */
163 /* GPIO driving Reset pin, if any */
167 /* enable soft reset workaround */
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| H A D | inno_rk3036.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Driver of Inno Codec for rk3036 by Rockchip Inc.
5 * Author: Zheng ShunQian<zhengsq@rock-chips.com>
11 /* codec registers */
25 #define INNO_R00_CSR_RESET (0x0 << 0) /*codec system reset*/
27 #define INNO_R00_CDCR_RESET (0x0 << 1) /*codec digital core reset*/
29 #define INNO_R00_PRB_DISABLE (0x0 << 6) /*power reset bypass*/
60 #define INNO_R03_DACR_RESET (0x0 << 1) /*DAC Reset*/
90 /* Gain of output, 1.5db step: -39db(0x0) ~ 0db(0x1a) ~ 6db(0x1f) */
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| H A D | cs4270.c | 2 * CS4270 ALSA SoC (ASoC) codec driver
6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
20 * - Only I2S and left-justified modes are supported
21 * - Power management is supported
36 * The codec isn't really big-endian or little-endian, since the I2S
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| /OK3568_Linux_fs/kernel/include/sound/ |
| H A D | hda_codec.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Universal Interface for Intel High Definition Audio Codec
21 #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
22 #define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
35 * codec bus
54 unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
55 /* status for codec/controller */
57 unsigned int response_reset:1; /* controller was reset */
58 unsigned int in_reset:1; /* during reset operation */
64 unsigned int mixer_assigned; /* codec addr for mixer name */
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| /OK3568_Linux_fs/kernel/sound/soc/cirrus/ |
| H A D | ep93xx-ac97.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on s3c-ac97 ASoC driver by Jaswinder Singh.
23 #include <linux/platform_data/dma-ep93xx.h>
26 #include "ep93xx-pcm.h"
29 * Per channel (1-4) registers.
31 #define AC97CH(n) (((n) - 1) * 0x20)
88 * struct ep93xx_ac97_info - EP93xx AC97 controller info structure
107 .name = "ac97-pcm-out",
113 .name = "ac97-pcm-in",
121 return __raw_readl(info->regs + reg); in ep93xx_ac97_read_reg()
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