1*4882a593SmuzhiyunSTA32X audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe driver for this device only supports I2C. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - compatible: "st,sta32x" 8*4882a593Smuzhiyun - reg: the I2C address of the device for I2C 9*4882a593Smuzhiyun - reset-gpios: a GPIO spec for the reset pin. If specified, it will be 10*4882a593Smuzhiyun deasserted before communication to the codec starts. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun - power-down-gpios: a GPIO spec for the power down pin. If specified, 13*4882a593Smuzhiyun it will be deasserted before communication to the codec 14*4882a593Smuzhiyun starts. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun - Vdda-supply: regulator spec, providing 3.3V 17*4882a593Smuzhiyun - Vdd3-supply: regulator spec, providing 3.3V 18*4882a593Smuzhiyun - Vcc-supply: regulator spec, providing 5V - 26V 19*4882a593Smuzhiyun 20*4882a593SmuzhiyunOptional properties: 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun - clocks, clock-names: Clock specifier for XTI input clock. 23*4882a593Smuzhiyun If specified, the clock will be enabled when the codec is probed, 24*4882a593Smuzhiyun and disabled when it is removed. The 'clock-names' must be set to 'xti'. 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun - st,output-conf: number, Selects the output configuration: 27*4882a593Smuzhiyun 0: 2-channel (full-bridge) power, 2-channel data-out 28*4882a593Smuzhiyun 1: 2 (half-bridge). 1 (full-bridge) on-board power 29*4882a593Smuzhiyun 2: 2 Channel (Full-Bridge) Power, 1 Channel FFX 30*4882a593Smuzhiyun 3: 1 Channel Mono-Parallel 31*4882a593Smuzhiyun If parameter is missing, mode 0 will be enabled. 32*4882a593Smuzhiyun This property has to be specified as '/bits/ 8' value. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun - st,ch1-output-mapping: Channel 1 output mapping 35*4882a593Smuzhiyun - st,ch2-output-mapping: Channel 2 output mapping 36*4882a593Smuzhiyun - st,ch3-output-mapping: Channel 3 output mapping 37*4882a593Smuzhiyun 0: Channel 1 38*4882a593Smuzhiyun 1: Channel 2 39*4882a593Smuzhiyun 2: Channel 3 40*4882a593Smuzhiyun If parameter is missing, channel 1 is chosen. 41*4882a593Smuzhiyun This properties have to be specified as '/bits/ 8' values. 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun - st,thermal-warning-recover: 44*4882a593Smuzhiyun If present, thermal warning recovery is enabled. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun - st,fault-detect-recovery: 47*4882a593Smuzhiyun If present, fault detect recovery is enabled. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun - st,thermal-warning-adjustment: 50*4882a593Smuzhiyun If present, thermal warning adjustment is enabled. 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun - st,fault-detect-recovery: 53*4882a593Smuzhiyun If present, then fault recovery will be enabled. 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun - st,drop-compensation-ns: number 56*4882a593Smuzhiyun Only required for "st,ffx-power-output-mode" == 57*4882a593Smuzhiyun "variable-drop-compensation". 58*4882a593Smuzhiyun Specifies the drop compensation in nanoseconds. 59*4882a593Smuzhiyun The value must be in the range of 0..300, and only 60*4882a593Smuzhiyun multiples of 20 are allowed. Default is 140ns. 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun - st,max-power-use-mpcc: 63*4882a593Smuzhiyun If present, then MPCC bits are used for MPC coefficients, 64*4882a593Smuzhiyun otherwise standard MPC coefficients are used. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun - st,max-power-corr: 67*4882a593Smuzhiyun If present, power bridge correction for THD reduction near maximum 68*4882a593Smuzhiyun power output is enabled. 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun - st,am-reduction-mode: 71*4882a593Smuzhiyun If present, FFX mode runs in AM reduction mode, otherwise normal 72*4882a593Smuzhiyun FFX mode is used. 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun - st,odd-pwm-speed-mode: 75*4882a593Smuzhiyun If present, PWM speed mode run on odd speed mode (341.3 kHz) on all 76*4882a593Smuzhiyun channels. If not present, normal PWM spped mode (384 kHz) will be used. 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun - st,invalid-input-detect-mute: 79*4882a593Smuzhiyun If present, automatic invalid input detect mute is enabled. 80*4882a593Smuzhiyun 81*4882a593SmuzhiyunExample: 82*4882a593Smuzhiyun 83*4882a593Smuzhiyuncodec: sta32x@38 { 84*4882a593Smuzhiyun compatible = "st,sta32x"; 85*4882a593Smuzhiyun reg = <0x1c>; 86*4882a593Smuzhiyun clocks = <&clock>; 87*4882a593Smuzhiyun clock-names = "xti"; 88*4882a593Smuzhiyun reset-gpios = <&gpio1 19 0>; 89*4882a593Smuzhiyun power-down-gpios = <&gpio1 16 0>; 90*4882a593Smuzhiyun st,output-conf = /bits/ 8 <0x3>; // set output to 2-channel 91*4882a593Smuzhiyun // (full-bridge) power, 92*4882a593Smuzhiyun // 2-channel data-out 93*4882a593Smuzhiyun st,ch1-output-mapping = /bits/ 8 <0>; // set channel 1 output ch 1 94*4882a593Smuzhiyun st,ch2-output-mapping = /bits/ 8 <0>; // set channel 2 output ch 1 95*4882a593Smuzhiyun st,ch3-output-mapping = /bits/ 8 <0>; // set channel 3 output ch 1 96*4882a593Smuzhiyun st,max-power-correction; // enables power bridge 97*4882a593Smuzhiyun // correction for THD reduction 98*4882a593Smuzhiyun // near maximum power output 99*4882a593Smuzhiyun st,invalid-input-detect-mute; // mute if no valid digital 100*4882a593Smuzhiyun // audio signal is provided. 101*4882a593Smuzhiyun}; 102