1*4882a593SmuzhiyunCS42L52 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun - compatible : "cirrus,cs42l52" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun - reg : the I2C address of the device for I2C 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunOptional properties: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - cirrus,reset-gpio : GPIO controller's phandle and the number 12*4882a593Smuzhiyun of the GPIO used to reset the codec. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency. 15*4882a593Smuzhiyun Allowable values of 0x00 through 0x0F. These are raw values written to the 16*4882a593Smuzhiyun register, not the actual frequency. The frequency is determined by the following. 17*4882a593Smuzhiyun Frequency = (64xFs)/(N+2) 18*4882a593Smuzhiyun N = chgfreq_val 19*4882a593Smuzhiyun Fs = Sample Rate (variable) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured 22*4882a593Smuzhiyun as a differential input. If not present then the MICA input is configured as 23*4882a593Smuzhiyun Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured 26*4882a593Smuzhiyun as a differential input. If not present then the MICB input is configured as 27*4882a593Smuzhiyun Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input. 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin 30*4882a593Smuzhiyun 0 = 0.5 x VA 31*4882a593Smuzhiyun 1 = 0.6 x VA 32*4882a593Smuzhiyun 2 = 0.7 x VA 33*4882a593Smuzhiyun 3 = 0.8 x VA 34*4882a593Smuzhiyun 4 = 0.83 x VA 35*4882a593Smuzhiyun 5 = 0.91 x VA 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunExample: 38*4882a593Smuzhiyun 39*4882a593Smuzhiyuncodec: codec@4a { 40*4882a593Smuzhiyun compatible = "cirrus,cs42l52"; 41*4882a593Smuzhiyun reg = <0x4a>; 42*4882a593Smuzhiyun reset-gpio = <&gpio 10 0>; 43*4882a593Smuzhiyun cirrus,chgfreq-divisor = <0x05>; 44*4882a593Smuzhiyun cirrus.mica-differential-cfg; 45*4882a593Smuzhiyun cirrus,micbias-lvl = <5>; 46*4882a593Smuzhiyun}; 47