1*4882a593SmuzhiyunRT5659/RT5658 audio CODEC 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis device supports I2C only. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- compatible : One of "realtek,rt5659" or "realtek,rt5658". 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun- reg : The I2C address of the device. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun- interrupts : The CODEC's interrupt output. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunOptional properties: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun- clocks: The phandle of the master clock to the CODEC 16*4882a593Smuzhiyun- clock-names: Should be "mclk" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun- realtek,in1-differential 19*4882a593Smuzhiyun- realtek,in3-differential 20*4882a593Smuzhiyun- realtek,in4-differential 21*4882a593Smuzhiyun Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended. 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun- realtek,dmic1-data-pin 24*4882a593Smuzhiyun 0: dmic1 is not used 25*4882a593Smuzhiyun 1: using IN2N pin as dmic1 data pin 26*4882a593Smuzhiyun 2: using GPIO5 pin as dmic1 data pin 27*4882a593Smuzhiyun 3: using GPIO9 pin as dmic1 data pin 28*4882a593Smuzhiyun 4: using GPIO11 pin as dmic1 data pin 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun- realtek,dmic2-data-pin 31*4882a593Smuzhiyun 0: dmic2 is not used 32*4882a593Smuzhiyun 1: using IN2P pin as dmic2 data pin 33*4882a593Smuzhiyun 2: using GPIO6 pin as dmic2 data pin 34*4882a593Smuzhiyun 3: using GPIO10 pin as dmic2 data pin 35*4882a593Smuzhiyun 4: using GPIO12 pin as dmic2 data pin 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun- realtek,jd-src 38*4882a593Smuzhiyun 0: No JD is used 39*4882a593Smuzhiyun 1: using JD3 as JD source 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun- realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. 42*4882a593Smuzhiyun- realtek,reset-gpios : The GPIO that controls the CODEC's RESET pin. 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunPins on the device (for linking into audio routes) for RT5659/RT5658: 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun * DMIC L1 47*4882a593Smuzhiyun * DMIC R1 48*4882a593Smuzhiyun * DMIC L2 49*4882a593Smuzhiyun * DMIC R2 50*4882a593Smuzhiyun * IN1P 51*4882a593Smuzhiyun * IN1N 52*4882a593Smuzhiyun * IN2P 53*4882a593Smuzhiyun * IN2N 54*4882a593Smuzhiyun * IN3P 55*4882a593Smuzhiyun * IN3N 56*4882a593Smuzhiyun * IN4P 57*4882a593Smuzhiyun * IN4N 58*4882a593Smuzhiyun * HPOL 59*4882a593Smuzhiyun * HPOR 60*4882a593Smuzhiyun * SPOL 61*4882a593Smuzhiyun * SPOR 62*4882a593Smuzhiyun * LOUTL 63*4882a593Smuzhiyun * LOUTR 64*4882a593Smuzhiyun * MONOOUT 65*4882a593Smuzhiyun * PDML 66*4882a593Smuzhiyun * PDMR 67*4882a593Smuzhiyun * SPDIF 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunExample: 70*4882a593Smuzhiyun 71*4882a593Smuzhiyunrt5659 { 72*4882a593Smuzhiyun compatible = "realtek,rt5659"; 73*4882a593Smuzhiyun reg = <0x1b>; 74*4882a593Smuzhiyun interrupt-parent = <&gpio>; 75*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>; 76*4882a593Smuzhiyun realtek,ldo1-en-gpios = 77*4882a593Smuzhiyun <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 78*4882a593Smuzhiyun}; 79