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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-am654.yaml69 ti,otap-del-sel-sdr12:
70 description: Output tap delay for SD UHS SDR12 timing
139 ti,itap-del-sel-sdr12:
140 description: Input tap delay for SD UHS SDR12 timing
H A Dcdns,sdhci.yaml49 cdns,phy-input-delay-sd-uhs-sdr12:
50 description: Value of the delay in the input path for SD UHS SDR12 timing
H A Dsdhci-omap.txt14 - pinctrl-names: Should be subset of "default", "hs", "sdr12", "sdr25", "sdr50",
H A Dsocionext,uniphier-sd.yaml98 sd-uhs-sdr12;
H A Dk3-dw-mshc.txt59 sd-uhs-sdr12;
H A Dmmc-controller.yaml131 sd-uhs-sdr12:
134 SD UHS SDR12 speed is supported.
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6qdl-colibri-v1_1-uhs.dtsi40 sd-uhs-sdr12;
H A Ddra7-evm.dts389 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
420 …pinctrl-names = "default-rev11", "default", "hs-rev11", "hs", "sdr12-rev11", "sdr12", "sdr25-rev11…
H A Drk3288-veyron-sdmmc.dtsi83 sd-uhs-sdr12;
H A Ddra72-evm.dts94 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
H A Dimx6ull-colibri-eval-v3.dtsi173 sd-uhs-sdr12;
H A Ddra72-evm-revc.dts124 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
H A Drv1106g-evb1-v10.dts156 sd-uhs-sdr12;
H A Drv1106g-evb1-v10-dual-cam.dts156 sd-uhs-sdr12;
H A Drv1106g-evb1-v11-cvr-dual-cam.dts146 sd-uhs-sdr12;
H A Drk3288-phycore-rdk.dts231 sd-uhs-sdr12;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a-clearfog-itx.dtsi31 sd-uhs-sdr12;
H A Dfsl-ls1012a-rdb.dts25 sd-uhs-sdr12;
H A Dfsl-lx2160a-rdb.dts70 sd-uhs-sdr12;
H A Dfsl-ls1046a-rdb.dts43 sd-uhs-sdr12;
H A Dfsl-ls1028a-rdb.dts90 sd-uhs-sdr12;
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-acpi.c669 * a) The clock divisor for SDR12, SDR25, and SDR50 is too small. in sdhci_acpi_emmc_amd_probe_slot()
671 * acceptable. i.e., SDR12 = 25 MHz, SDR25 = 50 MHz, SDR50 = in sdhci_acpi_emmc_amd_probe_slot()
681 * These presets have proper clock divisors. i.e., SDR12 => 12MHz, in sdhci_acpi_emmc_amd_probe_slot()
698 * firmware that that has valid presets (i.e., SDR12 <= 12 MHz). in sdhci_acpi_emmc_amd_probe_slot()
H A Ddw_mmc-k3.c80 {6, 0, 15, 15,}, /* 3: SDR12 */
92 {6, 0, 15, 15,}, /* 3: SDR12 */
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Dsdhci-cadence.c57 { "cdns,phy-input-delay-sd-uhs-sdr12", SDHCI_CDNS_PHY_DLY_UHS_SDR12, },
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxbb-p20x.dtsi196 sd-uhs-sdr12;

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