1*4882a593Smuzhiyun* Hisilicon specific extensions to the Synopsys Designware Mobile 2*4882a593Smuzhiyun Storage Host Controller 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRead synopsys-dw-mshc.txt for more details 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunThe Synopsys designware mobile storage host controller is used to interface 7*4882a593Smuzhiyuna SoC with storage medium such as eMMC or SD/MMC cards. This file documents 8*4882a593Smuzhiyundifferences between the core Synopsys dw mshc controller properties described 9*4882a593Smuzhiyunby synopsys-dw-mshc.txt and the properties used by the Hisilicon specific 10*4882a593Smuzhiyunextensions to the Synopsys Designware Mobile Storage Host Controller. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunRequired Properties: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun* compatible: should be one of the following. 15*4882a593Smuzhiyun - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. 16*4882a593Smuzhiyun - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers 17*4882a593Smuzhiyun with hi3670 specific extensions. 18*4882a593Smuzhiyun - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. 19*4882a593Smuzhiyun - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunOptional Properties: 22*4882a593Smuzhiyun- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunExample: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* for Hi3620 */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* SoC portion */ 29*4882a593Smuzhiyun dwmmc_0: dwmmc0@fcd03000 { 30*4882a593Smuzhiyun compatible = "hisilicon,hi4511-dw-mshc"; 31*4882a593Smuzhiyun reg = <0xfcd03000 0x1000>; 32*4882a593Smuzhiyun interrupts = <0 16 4>; 33*4882a593Smuzhiyun #address-cells = <1>; 34*4882a593Smuzhiyun #size-cells = <0>; 35*4882a593Smuzhiyun clocks = <&mmc_clock HI3620_SD_CIUCLK>, <&clock HI3620_DDRC_PER_CLK>; 36*4882a593Smuzhiyun clock-names = "ciu", "biu"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* Board portion */ 40*4882a593Smuzhiyun dwmmc0@fcd03000 { 41*4882a593Smuzhiyun vmmc-supply = <&ldo12>; 42*4882a593Smuzhiyun fifo-depth = <0x100>; 43*4882a593Smuzhiyun pinctrl-names = "default"; 44*4882a593Smuzhiyun pinctrl-0 = <&sd_pmx_pins &sd_cfg_func1 &sd_cfg_func2>; 45*4882a593Smuzhiyun bus-width = <4>; 46*4882a593Smuzhiyun disable-wp; 47*4882a593Smuzhiyun cd-gpios = <&gpio10 3 0>; 48*4882a593Smuzhiyun cap-mmc-highspeed; 49*4882a593Smuzhiyun cap-sd-highspeed; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* for Hi6220 */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun dwmmc_1: dwmmc1@f723e000 { 55*4882a593Smuzhiyun compatible = "hisilicon,hi6220-dw-mshc"; 56*4882a593Smuzhiyun bus-width = <0x4>; 57*4882a593Smuzhiyun disable-wp; 58*4882a593Smuzhiyun cap-sd-highspeed; 59*4882a593Smuzhiyun sd-uhs-sdr12; 60*4882a593Smuzhiyun sd-uhs-sdr25; 61*4882a593Smuzhiyun card-detect-delay = <200>; 62*4882a593Smuzhiyun hisilicon,peripheral-syscon = <&ao_ctrl>; 63*4882a593Smuzhiyun reg = <0x0 0xf723e000 0x0 0x1000>; 64*4882a593Smuzhiyun interrupts = <0x0 0x49 0x4>; 65*4882a593Smuzhiyun clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; 66*4882a593Smuzhiyun clock-names = "ciu", "biu"; 67*4882a593Smuzhiyun cd-gpios = <&gpio1 0 1>; 68*4882a593Smuzhiyun pinctrl-names = "default", "idle"; 69*4882a593Smuzhiyun pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; 70*4882a593Smuzhiyun pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; 71*4882a593Smuzhiyun vqmmc-supply = <&ldo7>; 72*4882a593Smuzhiyun vmmc-supply = <&ldo10>; 73*4882a593Smuzhiyun }; 74