1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2016 Andreas Färber 4*4882a593Smuzhiyun * Copyright (c) 2016 BayLibre, Inc. 5*4882a593Smuzhiyun * Author: Kevin Hilman <khilman@kernel.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "meson-gxbb.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun aliases { 12*4882a593Smuzhiyun serial0 = &uart_AO; 13*4882a593Smuzhiyun ethernet0 = ðmac; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen { 17*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun memory@0 { 21*4882a593Smuzhiyun device_type = "memory"; 22*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x40000000>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun usb_pwr: regulator-usb-pwrs { 26*4882a593Smuzhiyun compatible = "regulator-fixed"; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun regulator-name = "USB_PWR"; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 31*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* signal name in schematic: USB_PWR_EN */ 34*4882a593Smuzhiyun gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; 35*4882a593Smuzhiyun enable-active-high; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun vddio_card: gpio-regulator { 39*4882a593Smuzhiyun compatible = "regulator-gpio"; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun regulator-name = "VDDIO_CARD"; 42*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 43*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>; 46*4882a593Smuzhiyun gpios-states = <1>; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ 49*4882a593Smuzhiyun states = <1800000 0>, 50*4882a593Smuzhiyun <3300000 1>; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun regulator-settling-time-up-us = <10000>; 53*4882a593Smuzhiyun regulator-settling-time-down-us = <150000>; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun vddio_boot: regulator-vddio_boot { 57*4882a593Smuzhiyun compatible = "regulator-fixed"; 58*4882a593Smuzhiyun regulator-name = "VDDIO_BOOT"; 59*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 60*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun vddao_3v3: regulator-vddao_3v3 { 64*4882a593Smuzhiyun compatible = "regulator-fixed"; 65*4882a593Smuzhiyun regulator-name = "VDDAO_3V3"; 66*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 67*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun vcc_3v3: regulator-vcc_3v3 { 71*4882a593Smuzhiyun compatible = "regulator-fixed"; 72*4882a593Smuzhiyun regulator-name = "VCC_3V3"; 73*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 74*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 78*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 79*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun wifi32k: wifi32k { 83*4882a593Smuzhiyun compatible = "pwm-clock"; 84*4882a593Smuzhiyun #clock-cells = <0>; 85*4882a593Smuzhiyun clock-frequency = <32768>; 86*4882a593Smuzhiyun pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ 87*4882a593Smuzhiyun }; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun sdio_pwrseq: sdio-pwrseq { 90*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 91*4882a593Smuzhiyun reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; 92*4882a593Smuzhiyun clocks = <&wifi32k>; 93*4882a593Smuzhiyun clock-names = "ext_clock"; 94*4882a593Smuzhiyun }; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun cvbs_connector: cvbs-connector { 97*4882a593Smuzhiyun compatible = "composite-video-connector"; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun port { 100*4882a593Smuzhiyun cvbs_connector_in: endpoint { 101*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun hdmi-connector { 107*4882a593Smuzhiyun compatible = "hdmi-connector"; 108*4882a593Smuzhiyun type = "a"; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun port { 111*4882a593Smuzhiyun hdmi_connector_in: endpoint { 112*4882a593Smuzhiyun remote-endpoint = <&hdmi_tx_tmds_out>; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&cec_AO { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun pinctrl-0 = <&ao_cec_pins>; 121*4882a593Smuzhiyun pinctrl-names = "default"; 122*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&cvbs_vdac_port { 126*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 127*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun}; 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun&hdmi_tx { 132*4882a593Smuzhiyun status = "okay"; 133*4882a593Smuzhiyun pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; 134*4882a593Smuzhiyun pinctrl-names = "default"; 135*4882a593Smuzhiyun}; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun&hdmi_tx_tmds_port { 138*4882a593Smuzhiyun hdmi_tx_tmds_out: endpoint { 139*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun}; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun&ir { 144*4882a593Smuzhiyun status = "okay"; 145*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun}; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun&pwm_ef { 150*4882a593Smuzhiyun status = "okay"; 151*4882a593Smuzhiyun pinctrl-0 = <&pwm_e_pins>; 152*4882a593Smuzhiyun pinctrl-names = "default"; 153*4882a593Smuzhiyun clocks = <&clkc CLKID_FCLK_DIV4>; 154*4882a593Smuzhiyun clock-names = "clkin0"; 155*4882a593Smuzhiyun}; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun/* Wireless SDIO Module */ 158*4882a593Smuzhiyun&sd_emmc_a { 159*4882a593Smuzhiyun status = "okay"; 160*4882a593Smuzhiyun pinctrl-0 = <&sdio_pins>; 161*4882a593Smuzhiyun pinctrl-1 = <&sdio_clk_gate_pins>; 162*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 163*4882a593Smuzhiyun #address-cells = <1>; 164*4882a593Smuzhiyun #size-cells = <0>; 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun bus-width = <4>; 167*4882a593Smuzhiyun cap-sd-highspeed; 168*4882a593Smuzhiyun max-frequency = <50000000>; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun non-removable; 171*4882a593Smuzhiyun disable-wp; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun /* WiFi firmware requires power to be kept while in suspend */ 174*4882a593Smuzhiyun keep-power-in-suspend; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun mmc-pwrseq = <&sdio_pwrseq>; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 179*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun brcmf: wifi@1 { 182*4882a593Smuzhiyun reg = <1>; 183*4882a593Smuzhiyun compatible = "brcm,bcm4329-fmac"; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun/* SD card */ 188*4882a593Smuzhiyun&sd_emmc_b { 189*4882a593Smuzhiyun status = "okay"; 190*4882a593Smuzhiyun pinctrl-0 = <&sdcard_pins>; 191*4882a593Smuzhiyun pinctrl-1 = <&sdcard_clk_gate_pins>; 192*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun bus-width = <4>; 195*4882a593Smuzhiyun cap-sd-highspeed; 196*4882a593Smuzhiyun sd-uhs-sdr12; 197*4882a593Smuzhiyun sd-uhs-sdr25; 198*4882a593Smuzhiyun sd-uhs-sdr50; 199*4882a593Smuzhiyun max-frequency = <100000000>; 200*4882a593Smuzhiyun disable-wp; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun vmmc-supply = <&vddao_3v3>; 205*4882a593Smuzhiyun vqmmc-supply = <&vddio_card>; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun/* eMMC */ 209*4882a593Smuzhiyun&sd_emmc_c { 210*4882a593Smuzhiyun status = "okay"; 211*4882a593Smuzhiyun pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; 212*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 213*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun bus-width = <8>; 216*4882a593Smuzhiyun cap-mmc-highspeed; 217*4882a593Smuzhiyun max-frequency = <200000000>; 218*4882a593Smuzhiyun non-removable; 219*4882a593Smuzhiyun disable-wp; 220*4882a593Smuzhiyun mmc-ddr-1_8v; 221*4882a593Smuzhiyun mmc-hs200-1_8v; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 224*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 225*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 226*4882a593Smuzhiyun}; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun/* This UART is brought out to the DB9 connector */ 229*4882a593Smuzhiyun&uart_AO { 230*4882a593Smuzhiyun status = "okay"; 231*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 232*4882a593Smuzhiyun pinctrl-names = "default"; 233*4882a593Smuzhiyun}; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun&usb0_phy { 236*4882a593Smuzhiyun status = "okay"; 237*4882a593Smuzhiyun phy-supply = <&usb_pwr>; 238*4882a593Smuzhiyun}; 239*4882a593Smuzhiyun 240*4882a593Smuzhiyun&usb1_phy { 241*4882a593Smuzhiyun status = "okay"; 242*4882a593Smuzhiyun}; 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun&usb0 { 245*4882a593Smuzhiyun status = "okay"; 246*4882a593Smuzhiyun}; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun&usb1 { 249*4882a593Smuzhiyun status = "okay"; 250*4882a593Smuzhiyun}; 251