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/OK3568_Linux_fs/kernel/drivers/platform/x86/
H A Dpanasonic-laptop.c37 * add /proc/acpi/pcc/brightness interface for HAL access
141 #define ACPI_PCC_CLASS "pcc"
219 static int acpi_pcc_write_sset(struct pcc_acpi *pcc, int func, int val) in acpi_pcc_write_sset() argument
233 status = acpi_evaluate_object(pcc->handle, METHOD_HKEY_SSET, in acpi_pcc_write_sset()
255 static int acpi_pcc_retrieve_biosdata(struct pcc_acpi *pcc) in acpi_pcc_retrieve_biosdata() argument
262 status = acpi_evaluate_object(pcc->handle, METHOD_HKEY_SINF, NULL, in acpi_pcc_retrieve_biosdata()
277 if (pcc->num_sifr < hkey->package.count) { in acpi_pcc_retrieve_biosdata()
287 pcc->sinf[i] = element->integer.value; in acpi_pcc_retrieve_biosdata()
292 pcc->sinf[hkey->package.count] = -1; in acpi_pcc_retrieve_biosdata()
308 struct pcc_acpi *pcc = bl_get_data(bd); in bl_get() local
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/OK3568_Linux_fs/kernel/drivers/mailbox/
H A Dpcc.c6 * PCC (Platform Communication Channel) is defined in the ACPI 5.0+
11 * shared memory regions as defined in the PCC table entries. The PCC
12 * specification supports a Doorbell mechanism for the PCC clients
14 * is also specified in each PCC table entry.
18 * PCC Reads:
22 * * Client issues mbox_send_message() which rings the PCC doorbell
23 * for its PCC channel.
28 * PCC Writes:
33 * * Client issues mbox_send_message() which rings the PCC doorbell
34 * for its PCC channel.
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H A DKconfig82 config PCC config
89 (PCC) is typically used by CPPC (ACPI CPU Performance management),
92 PCC clients mentioned above.
/OK3568_Linux_fs/kernel/Documentation/admin-guide/pm/
H A Dcpufreq_drivers.rst80 ``pcc-cpufreq``
86 * pcc-cpufreq.txt - PCC interface documentation
100 1.1 PCC interface
113 Processor Clocking Control (PCC) is an interface between the platform
117 The PCC driver (pcc-cpufreq) allows OSPM to take advantage of the PCC
120 OS utilizes the PCC interface to inform platform firmware what frequency the
126 1.1 PCC interface:
128 The complete PCC specification is available here:
131 PCC relies on a shared memory region that provides a channel for communication
132 between the OS and platform firmware. PCC also implements a "doorbell" that
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/OK3568_Linux_fs/kernel/drivers/acpi/
H A Dcppc_acpi.c26 * called (PCC) Platform Communication Channel. This is a generic mailbox like
28 * See drivers/mailbox/pcc.c for details on PCC.
30 * Finer details about the PCC and CPPC spec are available in the ACPI v5.1 and
52 bool pending_pcc_write_cmd; /* Any pending/batched PCC write cmds? */
53 bool platform_owns_pcc; /* Ownership of PCC subspace */
54 unsigned int pcc_write_cnt; /* Running count of PCC write commands */
57 * Lock to provide controlled access to the PCC channel.
61 * before reading or writing to PCC subspace
80 /* Array to represent the PCC channel per subspace ID */
88 * include the type of register (e.g. PCC, System IO, FFH etc.)
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/OK3568_Linux_fs/kernel/drivers/hwmon/
H A Dxgene-hwmon.c27 #include <acpi/pcc.h>
60 /* PCC defines */
68 * to PCC commands
155 /* Copy the message to the PCC comm space */ in xgene_hwmon_pcc_rd()
447 * If PCC, send a consumer command to Platform to get info in xgene_hwmon_evt_work()
526 * This function is called when the PCC Mailbox received a message
666 if (device_property_read_u32(&pdev->dev, "pcc-channel", in xgene_hwmon_probe()
668 dev_err(&pdev->dev, "no pcc-channel property\n"); in xgene_hwmon_probe()
683 * The PCC mailbox controller driver should in xgene_hwmon_probe()
685 * PCC channels) and stored pointers to the in xgene_hwmon_probe()
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/OK3568_Linux_fs/kernel/drivers/i2c/busses/
H A Di2c-xgene-slimpro.c12 #include <acpi/pcc.h>
95 /* PCC related defines */
195 /* Copy the message to the PCC comm space */ in slimpro_i2c_pcc_tx_prepare()
481 if (device_property_read_u32(&pdev->dev, "pcc-channel", in xgene_slimpro_i2c_probe()
489 dev_err(&pdev->dev, "PCC mailbox channel request failed\n"); in xgene_slimpro_i2c_probe()
494 * The PCC mailbox controller driver should in xgene_slimpro_i2c_probe()
496 * PCC channels) and stored pointers to the in xgene_slimpro_i2c_probe()
507 dev_err(&pdev->dev, "PCC IRQ not supported\n"); in xgene_slimpro_i2c_probe()
529 dev_err(&pdev->dev, "Failed to get PCC comm region\n"); in xgene_slimpro_i2c_probe()
536 "Failed to ioremap PCC comm region\n"); in xgene_slimpro_i2c_probe()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dimx7ulp-pcc-clock.yaml4 $id: http://devicetree.org/schemas/clock/imx7ulp-pcc-clock.yaml#
7 title: Clock bindings for Freescale i.MX7ULP Peripheral Clock Control (PCC) modules
14 Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
28 The Peripheral Clock Control (PCC) is responsible for clock selection,
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dpcc.c12 #include <asm/arch/pcc.h>
123 printf("No PCS field for the PCC %d, clksrc type %d\n", in pcc_clock_sel()
136 printf("Not find the parent scg_clk in PCS of PCC %d, invalid scg_clk %d\n", clk, src); in pcc_clock_sel()
172 printf("No DIV/FRAC field for the PCC %d\n", clk); in pcc_clock_div_config()
224 printf("No PCS field for the PCC %d, clksrc type %d\n", in pcc_clock_get_clksrc()
237 printf("This pcc slot is not present = 0x%x\n", val); in pcc_clock_get_clksrc()
H A DMakefile8 obj-y := soc.o clock.o iomux.o pcc.o scg.o
/OK3568_Linux_fs/kernel/arch/mips/include/asm/dec/
H A Dkn01.h23 #define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */
50 #define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */
63 #define KN01_CSR_CRSRTST (1<<12) /* PCC test output */
66 #define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dspp.h13 * struct dpu_hw_pcc_coeff - PCC coefficient structure for each color
27 * struct dpu_hw_pcc - pcc feature structure
45 * setup_pcc - setup dspp pcc
H A Ddpu_hw_dspp.c36 base = ctx->cap->sblk->pcc.base; in dpu_setup_dspp_pcc()
39 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base); in dpu_setup_dspp_pcc()
44 DRM_DEBUG_DRIVER("disable pcc feature\n"); in dpu_setup_dspp_pcc()
/OK3568_Linux_fs/kernel/arch/sh/include/asm/
H A Dhd64461.h139 /* PCC Interface Status Register */
156 /* PCC General Control Register */
166 /* PCC Card Status Change Register */
176 /* PCC Card Status Change Interrupt Enable Register */
190 /* PCC Software Control Register */
/OK3568_Linux_fs/kernel/include/acpi/
H A Dcppc_acpi.h16 #include <acpi/pcc.h>
30 /* CPPC specific PCC commands. */
H A Dpcc.h3 * PCC (Platform Communications Channel) methods
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh7720.c231 SIOF0, SIOF1, MMC, PCC, enumerator
262 INTC_VECT(CMT, 0xf00), INTC_VECT(PCC, 0xf60),
275 { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
/OK3568_Linux_fs/kernel/drivers/acpi/acpica/
H A Dexfield.c201 * Reading from a PCC field unit does not require the handler because in acpi_ex_read_data_from_field()
205 "PCC FieldRead bits %u\n", in acpi_ex_read_data_from_field()
334 "PCC COMD field has been written. Invoking PCC handler now.\n")); in acpi_ex_write_data_to_field()
/OK3568_Linux_fs/kernel/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7763.c244 USBH, USBF, TPU, PCC, MMCIF, SIM, enumerator
281 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
310 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
329 { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } },
/OK3568_Linux_fs/kernel/arch/m68k/mvme147/
H A Dconfig.c98 .name = "pcc",
111 /* Using pcc tick timer 1 */
/OK3568_Linux_fs/u-boot/drivers/pci/
H A Dpcie_imx.c648 static struct pci_controller pcc; in imx_pcie_init() local
649 struct pci_controller *hose = &pcc; in imx_pcie_init()
652 memset(&pcc, 0, sizeof(pcc)); in imx_pcie_init()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dpcc.h284 /* PCC registers */
359 /* This structure keeps info for each pcc slot */
H A Dclock.h11 #include <asm/arch/pcc.h>
/OK3568_Linux_fs/kernel/drivers/cpufreq/
H A Dcppc_cpufreq.c200 * The PCC subspace describes the rate at which platform can accept commands
201 * on the shared PCC channel (including READs which do not count towards freq
202 * trasition requests), so ideally we need to use the PCC values as a fallback
/OK3568_Linux_fs/kernel/drivers/net/ethernet/
H A Djme.h124 * Dynamic(adaptive)/Static PCC values
528 JME_PCCRX0 = JME_MISC | 0x30, /* PCC Control for RX Queue 0 */
529 JME_PCCTX = JME_MISC | 0x40, /* PCC Control for TX Queues */
536 JME_PCCSRX0 = JME_MISC | 0x80, /* PCC Status of RX0 */
1081 * PCC Control Registers

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