1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/m68k/mvme147/config.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 1996 Dave Frascone [chaos@mindspring.com]
5*4882a593Smuzhiyun * Cloned from Richard Hirst [richard@sleepie.demon.co.uk]
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Based on:
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * Copyright (C) 1993 Hamish Macdonald
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
12*4882a593Smuzhiyun * License. See the file README.legal in the main directory of this archive
13*4882a593Smuzhiyun * for more details.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/types.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/mm.h>
19*4882a593Smuzhiyun #include <linux/tty.h>
20*4882a593Smuzhiyun #include <linux/clocksource.h>
21*4882a593Smuzhiyun #include <linux/console.h>
22*4882a593Smuzhiyun #include <linux/linkage.h>
23*4882a593Smuzhiyun #include <linux/init.h>
24*4882a593Smuzhiyun #include <linux/major.h>
25*4882a593Smuzhiyun #include <linux/genhd.h>
26*4882a593Smuzhiyun #include <linux/rtc.h>
27*4882a593Smuzhiyun #include <linux/interrupt.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <asm/bootinfo.h>
30*4882a593Smuzhiyun #include <asm/bootinfo-vme.h>
31*4882a593Smuzhiyun #include <asm/byteorder.h>
32*4882a593Smuzhiyun #include <asm/setup.h>
33*4882a593Smuzhiyun #include <asm/irq.h>
34*4882a593Smuzhiyun #include <asm/traps.h>
35*4882a593Smuzhiyun #include <asm/machdep.h>
36*4882a593Smuzhiyun #include <asm/mvme147hw.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static void mvme147_get_model(char *model);
40*4882a593Smuzhiyun extern void mvme147_sched_init(irq_handler_t handler);
41*4882a593Smuzhiyun extern int mvme147_hwclk (int, struct rtc_time *);
42*4882a593Smuzhiyun extern void mvme147_reset (void);
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun static int bcd2int (unsigned char b);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun
mvme147_parse_bootinfo(const struct bi_record * bi)48*4882a593Smuzhiyun int __init mvme147_parse_bootinfo(const struct bi_record *bi)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun uint16_t tag = be16_to_cpu(bi->tag);
51*4882a593Smuzhiyun if (tag == BI_VME_TYPE || tag == BI_VME_BRDINFO)
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun else
54*4882a593Smuzhiyun return 1;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
mvme147_reset(void)57*4882a593Smuzhiyun void mvme147_reset(void)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun pr_info("\r\n\nCalled mvme147_reset\r\n");
60*4882a593Smuzhiyun m147_pcc->watchdog = 0x0a; /* Clear timer */
61*4882a593Smuzhiyun m147_pcc->watchdog = 0xa5; /* Enable watchdog - 100ms to reset */
62*4882a593Smuzhiyun while (1)
63*4882a593Smuzhiyun ;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
mvme147_get_model(char * model)66*4882a593Smuzhiyun static void mvme147_get_model(char *model)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun sprintf(model, "Motorola MVME147");
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun /*
72*4882a593Smuzhiyun * This function is called during kernel startup to initialize
73*4882a593Smuzhiyun * the mvme147 IRQ handling routines.
74*4882a593Smuzhiyun */
75*4882a593Smuzhiyun
mvme147_init_IRQ(void)76*4882a593Smuzhiyun void __init mvme147_init_IRQ(void)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun m68k_setup_user_interrupt(VEC_USER, 192);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
config_mvme147(void)81*4882a593Smuzhiyun void __init config_mvme147(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun mach_max_dma_address = 0x01000000;
84*4882a593Smuzhiyun mach_sched_init = mvme147_sched_init;
85*4882a593Smuzhiyun mach_init_IRQ = mvme147_init_IRQ;
86*4882a593Smuzhiyun mach_hwclk = mvme147_hwclk;
87*4882a593Smuzhiyun mach_reset = mvme147_reset;
88*4882a593Smuzhiyun mach_get_model = mvme147_get_model;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* Board type is only set by newer versions of vmelilo/tftplilo */
91*4882a593Smuzhiyun if (!vme_brdtype)
92*4882a593Smuzhiyun vme_brdtype = VME_TYPE_MVME147;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun static u64 mvme147_read_clk(struct clocksource *cs);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun static struct clocksource mvme147_clk = {
98*4882a593Smuzhiyun .name = "pcc",
99*4882a593Smuzhiyun .rating = 250,
100*4882a593Smuzhiyun .read = mvme147_read_clk,
101*4882a593Smuzhiyun .mask = CLOCKSOURCE_MASK(32),
102*4882a593Smuzhiyun .flags = CLOCK_SOURCE_IS_CONTINUOUS,
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static u32 clk_total;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun #define PCC_TIMER_CLOCK_FREQ 160000
108*4882a593Smuzhiyun #define PCC_TIMER_CYCLES (PCC_TIMER_CLOCK_FREQ / HZ)
109*4882a593Smuzhiyun #define PCC_TIMER_PRELOAD (0x10000 - PCC_TIMER_CYCLES)
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* Using pcc tick timer 1 */
112*4882a593Smuzhiyun
mvme147_timer_int(int irq,void * dev_id)113*4882a593Smuzhiyun static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun irq_handler_t timer_routine = dev_id;
116*4882a593Smuzhiyun unsigned long flags;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun local_irq_save(flags);
119*4882a593Smuzhiyun m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
120*4882a593Smuzhiyun PCC_TIMER_TIC_EN;
121*4882a593Smuzhiyun m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
122*4882a593Smuzhiyun PCC_LEVEL_TIMER1;
123*4882a593Smuzhiyun clk_total += PCC_TIMER_CYCLES;
124*4882a593Smuzhiyun timer_routine(0, NULL);
125*4882a593Smuzhiyun local_irq_restore(flags);
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun return IRQ_HANDLED;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun
mvme147_sched_init(irq_handler_t timer_routine)131*4882a593Smuzhiyun void mvme147_sched_init (irq_handler_t timer_routine)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
134*4882a593Smuzhiyun "timer 1", timer_routine))
135*4882a593Smuzhiyun pr_err("Couldn't register timer interrupt\n");
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Init the clock with a value */
138*4882a593Smuzhiyun /* The clock counter increments until 0xFFFF then reloads */
139*4882a593Smuzhiyun m147_pcc->t1_preload = PCC_TIMER_PRELOAD;
140*4882a593Smuzhiyun m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF | PCC_TIMER_COC_EN |
141*4882a593Smuzhiyun PCC_TIMER_TIC_EN;
142*4882a593Smuzhiyun m147_pcc->t1_int_cntrl = PCC_INT_ENAB | PCC_TIMER_INT_CLR |
143*4882a593Smuzhiyun PCC_LEVEL_TIMER1;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun clocksource_register_hz(&mvme147_clk, PCC_TIMER_CLOCK_FREQ);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
mvme147_read_clk(struct clocksource * cs)148*4882a593Smuzhiyun static u64 mvme147_read_clk(struct clocksource *cs)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun unsigned long flags;
151*4882a593Smuzhiyun u8 overflow, tmp;
152*4882a593Smuzhiyun u16 count;
153*4882a593Smuzhiyun u32 ticks;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun local_irq_save(flags);
156*4882a593Smuzhiyun tmp = m147_pcc->t1_cntrl >> 4;
157*4882a593Smuzhiyun count = m147_pcc->t1_count;
158*4882a593Smuzhiyun overflow = m147_pcc->t1_cntrl >> 4;
159*4882a593Smuzhiyun if (overflow != tmp)
160*4882a593Smuzhiyun count = m147_pcc->t1_count;
161*4882a593Smuzhiyun count -= PCC_TIMER_PRELOAD;
162*4882a593Smuzhiyun ticks = count + overflow * PCC_TIMER_CYCLES;
163*4882a593Smuzhiyun ticks += clk_total;
164*4882a593Smuzhiyun local_irq_restore(flags);
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return ticks;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
bcd2int(unsigned char b)169*4882a593Smuzhiyun static int bcd2int (unsigned char b)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun return ((b>>4)*10 + (b&15));
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
mvme147_hwclk(int op,struct rtc_time * t)174*4882a593Smuzhiyun int mvme147_hwclk(int op, struct rtc_time *t)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun #warning check me!
177*4882a593Smuzhiyun if (!op) {
178*4882a593Smuzhiyun m147_rtc->ctrl = RTC_READ;
179*4882a593Smuzhiyun t->tm_year = bcd2int (m147_rtc->bcd_year);
180*4882a593Smuzhiyun t->tm_mon = bcd2int(m147_rtc->bcd_mth) - 1;
181*4882a593Smuzhiyun t->tm_mday = bcd2int (m147_rtc->bcd_dom);
182*4882a593Smuzhiyun t->tm_hour = bcd2int (m147_rtc->bcd_hr);
183*4882a593Smuzhiyun t->tm_min = bcd2int (m147_rtc->bcd_min);
184*4882a593Smuzhiyun t->tm_sec = bcd2int (m147_rtc->bcd_sec);
185*4882a593Smuzhiyun m147_rtc->ctrl = 0;
186*4882a593Smuzhiyun if (t->tm_year < 70)
187*4882a593Smuzhiyun t->tm_year += 100;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun return 0;
190*4882a593Smuzhiyun }
191