1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Hardware info about DECstation DS2100/3100 systems (otherwise known as 3*4882a593Smuzhiyun * pmin/pmax or KN01). 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public 6*4882a593Smuzhiyun * License. See the file "COPYING" in the main directory of this archive 7*4882a593Smuzhiyun * for more details. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions 10*4882a593Smuzhiyun * are by courtesy of Chris Fraser. 11*4882a593Smuzhiyun * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun #ifndef __ASM_MIPS_DEC_KN01_H 14*4882a593Smuzhiyun #define __ASM_MIPS_DEC_KN01_H 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define KN01_SLOT_BASE 0x10000000 17*4882a593Smuzhiyun #define KN01_SLOT_SIZE 0x01000000 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * Address ranges for devices. 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun #define KN01_PMASK (0*KN01_SLOT_SIZE) /* color plane mask */ 23*4882a593Smuzhiyun #define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */ 24*4882a593Smuzhiyun #define KN01_VDAC (2*KN01_SLOT_SIZE) /* color map */ 25*4882a593Smuzhiyun #define KN01_RES_3 (3*KN01_SLOT_SIZE) /* unused */ 26*4882a593Smuzhiyun #define KN01_RES_4 (4*KN01_SLOT_SIZE) /* unused */ 27*4882a593Smuzhiyun #define KN01_RES_5 (5*KN01_SLOT_SIZE) /* unused */ 28*4882a593Smuzhiyun #define KN01_RES_6 (6*KN01_SLOT_SIZE) /* unused */ 29*4882a593Smuzhiyun #define KN01_ERRADDR (7*KN01_SLOT_SIZE) /* write error address */ 30*4882a593Smuzhiyun #define KN01_LANCE (8*KN01_SLOT_SIZE) /* LANCE (Am7990) Ethernet */ 31*4882a593Smuzhiyun #define KN01_LANCE_MEM (9*KN01_SLOT_SIZE) /* LANCE buffer memory */ 32*4882a593Smuzhiyun #define KN01_SII (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */ 33*4882a593Smuzhiyun #define KN01_SII_MEM (11*KN01_SLOT_SIZE) /* SII buffer memory */ 34*4882a593Smuzhiyun #define KN01_DZ11 (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */ 35*4882a593Smuzhiyun #define KN01_RTC (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */ 36*4882a593Smuzhiyun #define KN01_ESAR (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */ 37*4882a593Smuzhiyun #define KN01_CSR (14*KN01_SLOT_SIZE) /* system ctrl & status reg */ 38*4882a593Smuzhiyun #define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * Frame buffer memory address. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun #define KN01_VFB_MEM 0x0fc00000 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* 47*4882a593Smuzhiyun * CPU interrupt bits. 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun #define KN01_CPU_INR_BUS 6 /* memory, I/O bus read/write errors */ 50*4882a593Smuzhiyun #define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */ 51*4882a593Smuzhiyun #define KN01_CPU_INR_RTC 5 /* DS1287 RTC */ 52*4882a593Smuzhiyun #define KN01_CPU_INR_DZ11 4 /* DZ11 (DC7085) serial */ 53*4882a593Smuzhiyun #define KN01_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */ 54*4882a593Smuzhiyun #define KN01_CPU_INR_SII 2 /* SII (DC7061) SCSI */ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* 58*4882a593Smuzhiyun * System Control & Status Register bits. 59*4882a593Smuzhiyun */ 60*4882a593Smuzhiyun #define KN01_CSR_MNFMOD (1<<15) /* MNFMOD manufacturing jumper */ 61*4882a593Smuzhiyun #define KN01_CSR_STATUS (1<<14) /* self-test result status output */ 62*4882a593Smuzhiyun #define KN01_CSR_PARDIS (1<<13) /* parity error disable */ 63*4882a593Smuzhiyun #define KN01_CSR_CRSRTST (1<<12) /* PCC test output */ 64*4882a593Smuzhiyun #define KN01_CSR_MONO (1<<11) /* mono/color fb SIMM installed */ 65*4882a593Smuzhiyun #define KN01_CSR_MEMERR (1<<10) /* write timeout error status & ack*/ 66*4882a593Smuzhiyun #define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */ 67*4882a593Smuzhiyun #define KN01_CSR_TXDIS (1<<8) /* DZ11 transmit disable */ 68*4882a593Smuzhiyun #define KN01_CSR_VBGTRG (1<<2) /* blue DAC voltage over green (r/o) */ 69*4882a593Smuzhiyun #define KN01_CSR_VRGTRG (1<<1) /* red DAC voltage over green (r/o) */ 70*4882a593Smuzhiyun #define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */ 71*4882a593Smuzhiyun #define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */ 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun #include <linux/interrupt.h> 77*4882a593Smuzhiyun #include <linux/spinlock.h> 78*4882a593Smuzhiyun #include <linux/types.h> 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun struct pt_regs; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun extern u16 cached_kn01_csr; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun extern void dec_kn01_be_init(void); 85*4882a593Smuzhiyun extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup); 86*4882a593Smuzhiyun extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id); 87*4882a593Smuzhiyun #endif 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #endif /* __ASM_MIPS_DEC_KN01_H */ 90