| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/ |
| H A D | ti,phy-gmii-sel.yaml | 5 $id: "http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#" 26 | |Port 1..<--+-->GMII/MII<-------> 51 - ti,am3352-phy-gmii-sel 52 - ti,dra7xx-phy-gmii-sel 53 - ti,am43xx-phy-gmii-sel 54 - ti,dm814-phy-gmii-sel 55 - ti,am654-phy-gmii-sel 68 - ti,dra7xx-phy-gmii-sel 69 - ti,dm814-phy-gmii-sel 70 - ti,am654-phy-gmii-sel [all …]
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| /OK3568_Linux_fs/kernel/drivers/pinctrl/zte/ |
| H A D | pinctrl-zx296718.c | 469 TOP_MUX(0x0, "GMII"), /* gtx_clk */ 473 TOP_MUX(0x0, "GMII"), /* tx_clk */ 477 TOP_MUX(0x0, "GMII"), /* txd0 */ 481 TOP_MUX(0x0, "GMII"), /* txd1 */ 485 TOP_MUX(0x0, "GMII"), /* txd2 */ 489 TOP_MUX(0x0, "GMII"), /* txd3 */ 493 TOP_MUX(0x0, "GMII"), /* txd4 */ 497 TOP_MUX(0x0, "GMII"), /* txd5 */ 501 TOP_MUX(0x0, "GMII"), /* txd6 */ 505 TOP_MUX(0x0, "GMII"), /* txd7 */ [all …]
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| /OK3568_Linux_fs/u-boot/drivers/net/ |
| H A D | cpsw-common.c | 26 fdt32_t gmii = 0; in davinci_emac_3517_get_macid() local 36 addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii), in davinci_emac_3517_get_macid() 66 fdt32_t gmii = 0; in cpsw_am33xx_cm_get_macid() local 76 addr = (u32)map_physmem(fdt_translate_address(fdt, syscon, &gmii), in cpsw_am33xx_cm_get_macid()
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/ |
| H A D | xilinx_gmii2rgmii.txt | 4 The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media 18 - compatible : Should be "xlnx,gmii-to-rgmii-1.0" 31 compatible = "xlnx,gmii-to-rgmii-1.0";
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| H A D | socfpga-dwmac.txt | 32 - compatible : Should be altr,gmii-to-sgmii-2.0 38 compatible = "altr,gmii-to-sgmii-2.0"; 56 altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
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| H A D | cpsw-phy-sel.txt | 21 reg-names = "gmii-sel"; 28 reg-names = "gmii-sel";
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| H A D | snps,dwc-qos-ethernet.txt | 29 In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX 34 In some configurations (e.g. GMII/RGMII), this clock is derived from the 146 phy-mode = "gmii";
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| H A D | altera_tse.txt | 71 phy-mode = "gmii"; 109 phy-mode = "gmii";
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| H A D | ti,dp83867.yaml | 25 Media Independent Interface (GMII) or Reduced GMII (RGMII).
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| H A D | qca,ar71xx.yaml | 102 phy-mode = "gmii"; 139 phy-mode = "gmii";
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| H A D | cpsw.txt | 48 - phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt)
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| H A D | marvell-pp2.txt | 69 phy-mode = "gmii"; 76 phy-mode = "gmii";
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| /OK3568_Linux_fs/kernel/drivers/phy/ti/ |
| H A D | phy-gmii-sel.c | 193 .compatible = "ti,am3352-phy-gmii-sel", 197 .compatible = "ti,dra7xx-phy-gmii-sel", 201 .compatible = "ti,am43xx-phy-gmii-sel", 205 .compatible = "ti,dm814-phy-gmii-sel", 209 .compatible = "ti,am654-phy-gmii-sel", 395 .name = "phy-gmii-sel",
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | socfpga_vt.dts | 40 phy-mode = "gmii"; 76 phy-mode = "gmii";
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| H A D | gemini-nas4220b.dts | 103 pinctrl-gmii { 105 function = "gmii";
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| /OK3568_Linux_fs/u-boot/board/freescale/mpc8568mds/ |
| H A D | bcsr.h | 63 1 UCC GMII enable 70 1 UCC2 GMII enable
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-socfpga.c | 149 "altr,gmii-to-sgmii-converter", 0); in socfpga_dwmac_parse_data() 274 /* Overwrite val to GMII if splitter core is enabled. The phymode here in socfpga_gen5_set_phy_mode() 276 * EMAC core is GMII. in socfpga_gen5_set_phy_mode() 334 /* Overwrite val to GMII if splitter core is enabled. The phymode here in socfpga_gen10_set_phy_mode() 336 * EMAC core is GMII. in socfpga_gen10_set_phy_mode()
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| /OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/executive/ |
| H A D | cvmx-helper-rgmii.c | 29 * Functions for RGMII/GMII/MII initialization, configuration, 50 * Returns Number of RGMII/GMII/MII ports (0-4). 68 * GMII/MII mode. This limits us to 2 ports in __cvmx_helper_rgmii_probe() 411 * 1 1 1 X Port 1: GMII/MII; Port 2: disabled. GMII or in __cvmx_helper_rgmii_link_set()
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/net/ |
| H A D | snps,dwc-qos-ethernet.txt | 26 In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX 31 In some configurations (e.g. GMII/RGMII), this clock is derived from the 144 phy-mode = "gmii";
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| H A D | altera_tse.txt | 70 phy-mode = "gmii"; 108 phy-mode = "gmii";
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| H A D | ucc.txt | 50 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal 66 phy-connection-type = "gmii";
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| /OK3568_Linux_fs/kernel/arch/mips/include/asm/octeon/ |
| H A D | cvmx-helper-rgmii.h | 31 * Functions for RGMII/GMII/MII initialization, configuration, 43 * Returns Number of RGMII/GMII/MII ports (0-4).
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/dsa/ |
| H A D | ar9331.txt | 47 phy-mode = "gmii"; 82 phy-mode = "gmii";
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| /OK3568_Linux_fs/u-boot/board/spear/x600/ |
| H A D | x600.c | 110 /* Extended PHY control 1, select GMII */ in board_phy_config() 113 /* Software reset necessary after GMII mode selction */ in board_phy_config()
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| /OK3568_Linux_fs/u-boot/include/ |
| H A D | fsl_dtsec.h | 167 #define ECNTRL_GMIIM 0x00000040 /* 1- GMII or RGMII interface mode */ 216 #define MACCFG2_IF_MODE_BYTE 0x00000200 /* GMII/TBI, 1000 GMII/TBI */
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