1*4882a593SmuzhiyunTI SoC Ethernet Switch Controller Device Tree Bindings 2*4882a593Smuzhiyun------------------------------------------------------ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible : Should be one of the below:- 6*4882a593Smuzhiyun "ti,cpsw" for backward compatible 7*4882a593Smuzhiyun "ti,am335x-cpsw" for AM335x controllers 8*4882a593Smuzhiyun "ti,am4372-cpsw" for AM437x controllers 9*4882a593Smuzhiyun "ti,dra7-cpsw" for DRA7x controllers 10*4882a593Smuzhiyun- reg : physical base address and size of the cpsw 11*4882a593Smuzhiyun registers map 12*4882a593Smuzhiyun- interrupts : property with a value describing the interrupt 13*4882a593Smuzhiyun number 14*4882a593Smuzhiyun- cpdma_channels : Specifies number of channels in CPDMA 15*4882a593Smuzhiyun- ale_entries : Specifies No of entries ALE can hold 16*4882a593Smuzhiyun- bd_ram_size : Specifies internal descriptor RAM size 17*4882a593Smuzhiyun- mac_control : Specifies Default MAC control register content 18*4882a593Smuzhiyun for the specific platform 19*4882a593Smuzhiyun- slaves : Specifies number for slaves 20*4882a593Smuzhiyun- active_slave : Specifies the slave to use for time stamping, 21*4882a593Smuzhiyun ethtool and SIOCGMIIPHY 22*4882a593Smuzhiyun- cpsw-phy-sel : Specifies the phandle to the CPSW phy mode selection 23*4882a593Smuzhiyun device. See also cpsw-phy-sel.txt for it's binding. 24*4882a593Smuzhiyun Note that in legacy cases cpsw-phy-sel may be 25*4882a593Smuzhiyun a child device instead of a phandle 26*4882a593Smuzhiyun (DEPRECATED, use phys property instead). 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunOptional properties: 29*4882a593Smuzhiyun- ti,hwmods : Must be "cpgmac0" 30*4882a593Smuzhiyun- dual_emac : Specifies Switch to act as Dual EMAC 31*4882a593Smuzhiyun- syscon : Phandle to the system control device node, which is 32*4882a593Smuzhiyun the control module device of the am33x 33*4882a593Smuzhiyun- mode-gpios : Should be added if one/multiple gpio lines are 34*4882a593Smuzhiyun required to be driven so that cpsw data lines 35*4882a593Smuzhiyun can be connected to the phy via selective mux. 36*4882a593Smuzhiyun For example in dra72x-evm, pcf gpio has to be 37*4882a593Smuzhiyun driven low so that cpsw slave 0 and phy data 38*4882a593Smuzhiyun lines are connected via mux. 39*4882a593Smuzhiyun- cpts_clock_mult : Numerator to convert input clock ticks into nanoseconds 40*4882a593Smuzhiyun- cpts_clock_shift : Denominator to convert input clock ticks into nanoseconds 41*4882a593Smuzhiyun Mult and shift will be calculated basing on CPTS 42*4882a593Smuzhiyun rftclk frequency if both cpts_clock_shift and 43*4882a593Smuzhiyun cpts_clock_mult properties are not provided. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunSlave Properties: 46*4882a593SmuzhiyunRequired properties: 47*4882a593Smuzhiyun- phy-mode : See ethernet.txt file in the same directory 48*4882a593Smuzhiyun- phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt) 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunOptional properties: 51*4882a593Smuzhiyun- dual_emac_res_vlan : Specifies VID to be used to segregate the ports 52*4882a593Smuzhiyun- phy_id : Specifies slave phy id (deprecated, use phy-handle) 53*4882a593Smuzhiyun- phy-handle : See ethernet.txt file in the same directory 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunThe MAC address will be determined using the optional properties 56*4882a593Smuzhiyundefined in ethernet.txt. 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunSlave sub-nodes: 59*4882a593Smuzhiyun- fixed-link : See fixed-link.txt file in the same directory 60*4882a593Smuzhiyun 61*4882a593SmuzhiyunNote: Exactly one of phy_id, phy-handle, or fixed-link must be specified. 62*4882a593Smuzhiyun 63*4882a593SmuzhiyunNote: "ti,hwmods" field is used to fetch the base address and irq 64*4882a593Smuzhiyunresources from TI, omap hwmod data base during device registration. 65*4882a593SmuzhiyunFuture plan is to migrate hwmod data base contents into device tree 66*4882a593Smuzhiyunblob so that, all the required data will be used from device tree dts 67*4882a593Smuzhiyunfile. 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunExamples: 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun mac: ethernet@4a100000 { 72*4882a593Smuzhiyun compatible = "ti,cpsw"; 73*4882a593Smuzhiyun reg = <0x4A100000 0x1000>; 74*4882a593Smuzhiyun interrupts = <55 0x4>; 75*4882a593Smuzhiyun interrupt-parent = <&intc>; 76*4882a593Smuzhiyun cpdma_channels = <8>; 77*4882a593Smuzhiyun ale_entries = <1024>; 78*4882a593Smuzhiyun bd_ram_size = <0x2000>; 79*4882a593Smuzhiyun rx_descs = <64>; 80*4882a593Smuzhiyun mac_control = <0x20>; 81*4882a593Smuzhiyun slaves = <2>; 82*4882a593Smuzhiyun active_slave = <0>; 83*4882a593Smuzhiyun cpts_clock_mult = <0x80000000>; 84*4882a593Smuzhiyun cpts_clock_shift = <29>; 85*4882a593Smuzhiyun syscon = <&cm>; 86*4882a593Smuzhiyun cpsw-phy-sel = <&phy_sel>; 87*4882a593Smuzhiyun cpsw_emac0: slave@0 { 88*4882a593Smuzhiyun phy_id = <&davinci_mdio>, <0>; 89*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 90*4882a593Smuzhiyun /* Filled in by U-Boot */ 91*4882a593Smuzhiyun mac-address = [ 00 00 00 00 00 00 ]; 92*4882a593Smuzhiyun phys = <&phy_gmii_sel 1 0>; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun cpsw_emac1: slave@1 { 95*4882a593Smuzhiyun phy_id = <&davinci_mdio>, <1>; 96*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 97*4882a593Smuzhiyun /* Filled in by U-Boot */ 98*4882a593Smuzhiyun mac-address = [ 00 00 00 00 00 00 ]; 99*4882a593Smuzhiyun phys = <&phy_gmii_sel 2 0>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun(or) 104*4882a593Smuzhiyun mac: ethernet@4a100000 { 105*4882a593Smuzhiyun compatible = "ti,cpsw"; 106*4882a593Smuzhiyun ti,hwmods = "cpgmac0"; 107*4882a593Smuzhiyun cpdma_channels = <8>; 108*4882a593Smuzhiyun ale_entries = <1024>; 109*4882a593Smuzhiyun bd_ram_size = <0x2000>; 110*4882a593Smuzhiyun rx_descs = <64>; 111*4882a593Smuzhiyun mac_control = <0x20>; 112*4882a593Smuzhiyun slaves = <2>; 113*4882a593Smuzhiyun active_slave = <0>; 114*4882a593Smuzhiyun cpts_clock_mult = <0x80000000>; 115*4882a593Smuzhiyun cpts_clock_shift = <29>; 116*4882a593Smuzhiyun syscon = <&cm>; 117*4882a593Smuzhiyun cpsw-phy-sel = <&phy_sel>; 118*4882a593Smuzhiyun cpsw_emac0: slave@0 { 119*4882a593Smuzhiyun phy_id = <&davinci_mdio>, <0>; 120*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 121*4882a593Smuzhiyun /* Filled in by U-Boot */ 122*4882a593Smuzhiyun mac-address = [ 00 00 00 00 00 00 ]; 123*4882a593Smuzhiyun phys = <&phy_gmii_sel 1 0>; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun cpsw_emac1: slave@1 { 126*4882a593Smuzhiyun phy_id = <&davinci_mdio>, <1>; 127*4882a593Smuzhiyun phy-mode = "rgmii-txid"; 128*4882a593Smuzhiyun /* Filled in by U-Boot */ 129*4882a593Smuzhiyun mac-address = [ 00 00 00 00 00 00 ]; 130*4882a593Smuzhiyun phys = <&phy_gmii_sel 2 0>; 131*4882a593Smuzhiyun }; 132*4882a593Smuzhiyun }; 133