Home
last modified time | relevance | path

Searched +full:0 +full:xff900000 (Results 1 – 20 of 20) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dbase_addr_ac5.h10 #define SOCFPGA_STM_ADDRESS 0xfc000000
11 #define SOCFPGA_DAP_ADDRESS 0xff000000
12 #define SOCFPGA_EMAC0_ADDRESS 0xff700000
13 #define SOCFPGA_EMAC1_ADDRESS 0xff702000
14 #define SOCFPGA_SDMMC_ADDRESS 0xff704000
15 #define SOCFPGA_QSPI_ADDRESS 0xff705000
16 #define SOCFPGA_GPIO0_ADDRESS 0xff708000
17 #define SOCFPGA_GPIO1_ADDRESS 0xff709000
18 #define SOCFPGA_GPIO2_ADDRESS 0xff70a000
19 #define SOCFPGA_L3REGS_ADDRESS 0xff800000
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/
H A Ddenali,nand.yaml138 reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
139 interrupts = <0 144 4>;
145 #size-cells = <0>;
147 nand@0 {
148 reg = <0>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dhighbank.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
24 reg = <0x900>;
43 reg = <0x901>;
62 reg = <0x902>;
81 reg = <0x903>;
98 memory@0 {
101 reg = <0x00000000 0xff900000>;
105 ranges = <0x00000000 0x00000000 0xffffffff>;
109 reg = <0xfff00000 0x1000>;
[all …]
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
H A Drk3288.dtsi70 #size-cells = <0>;
77 reg = <0x500>;
89 reg = <0x501>;
101 reg = <0x502>;
113 reg = <0x503>;
138 0 17
144 0 15300 0
151 rockchip,pvtm-ch = <0 0>;
269 reg = <0x0 0xff250000 0x0 0x4000>;
281 reg = <0x0 0xff600000 0x0 0x4000>;
[all …]
/OK3568_Linux_fs/kernel/arch/m68k/include/asm/
H A Dbvme6000hw.h11 #define BVME_PIT_BASE 0xffa00000
47 #define BVME_RTC_BASE 0xff900000
86 #define BVME_I596_BASE 0xff100000
88 #define BVME_ETHIRQ_REG 0xff20000b
90 #define BVME_LOCAL_IRQ_STAT 0xff20000f
92 #define BVME_ETHERR 0x02
93 #define BVME_ABORT_STATUS 0x08
95 #define BVME_NCR53C710_BASE 0xff000000
97 #define BVME_SCC_A_ADDR 0xffb0000b
98 #define BVME_SCC_B_ADDR 0xffb00003
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8192e/rtl8192e/
H A Drtl_core.h66 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
67 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10
86 #define DEFAULT_BEACONINTERVAL 0x64U
112 NIC_UNKNOWN = 0,
128 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
129 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
130 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
131 TXCMD_SET_TX_DURATION = 0xFF900003,
132 TXCMD_SET_RX_RSSI = 0xFF900004,
133 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c20 #define PERI_GRF_BASE 0xff000000
21 #define PERI_GRF_PERI_CON1 0x0004
23 #define CORE_GRF_BASE 0xff040000
24 #define CORE_GRF_CACHE_PERI_ADDR_START 0x0024
25 #define CORE_GRF_CACHE_PERI_ADDR_END 0x0028
26 #define CORE_GRF_MCU_CACHE_MISC 0x002c
28 #define PERI_GRF_BASE 0xff000000
29 #define PERI_GRF_USBPHY_CON0 0x0050
31 #define PERI_SGRF_BASE 0xff070000
32 #define PERI_SGRF_FIREWALL_CON0 0x0020
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi21 service_reserved: svcbuffer@0 {
23 reg = <0x0 0x0 0x0 0x2000000>;
24 alignment = <0x1000>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
37 reg = <0x0>;
44 reg = <0x1>;
51 reg = <0x2>;
58 reg = <0x3>;
64 interrupts = <0 170 4>,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi21 service_reserved: svcbuffer@0 {
23 reg = <0x0 0x0 0x0 0x1000000>;
24 alignment = <0x1000>;
31 #size-cells = <0>;
33 cpu0: cpu@0 {
37 reg = <0x0>;
44 reg = <0x1>;
51 reg = <0x2>;
58 reg = <0x3>;
64 interrupts = <0 170 4>,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-orion5x/
H A Dts78xx-setup.c36 #define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
37 #define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000)
41 .id = 0,
68 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
81 #define TS_RTC_CTRL (TS78XX_FPGA_REGS_PHYS_BASE + 0x808)
82 #define TS_RTC_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x80c)
85 DEFINE_RES_MEM(TS_RTC_CTRL, 0x01),
86 DEFINE_RES_MEM(TS_RTC_DATA, 0x01),
100 if (ts78xx_fpga.supports.ts_rtc.init == 0) { in ts78xx_ts_rtc_load()
122 #define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8192u/
H A Dr8192U.h57 } while (0)
59 #define COMP_TRACE BIT(0) /* Function call tracing. */
105 } while (0)
117 for (i = 0; i < (int)(datalen); i++) { \
119 if ((i+1)%16 == 0) \
124 } while (0)
126 #define RTL8192U_ASSERT(expr) do {} while (0)
127 #define RT_DEBUG_DATA(level, data, datalen) do {} while (0)
131 #define QSLT_BK 0x1
132 #define QSLT_BE 0x0
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi100 reg = <0x0 0x05000000 0x0 0x300000>;
106 reg = <0x0 0x05300000 0x0 0x2000000>;
113 size = <0x0 0x10000000>;
114 alignment = <0x0 0x400000>;
131 reg = <0x0 0xfc000000 0x0 0x400000
132 0x0 0xff648000 0x0 0x2000
133 0x0 0xfc400000 0x0 0x200000>;
137 interrupt-map-mask = <0 0 0 0>;
138 interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
139 bus-range = <0x0 0xff>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3399.dtsi42 #size-cells = <0>;
70 cpu_l0: cpu@0 {
73 reg = <0x0 0x0>;
82 reg = <0x0 0x1>;
90 reg = <0x0 0x2>;
98 reg = <0x0 0x3>;
106 reg = <0x0 0x100>;
115 reg = <0x0 0x101>;
164 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW 0>,
165 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW 0>,
[all …]
H A D.rk3399-evb.dtb.dts.tmp
H A D.rk3399-puma-ddr1600.dtb.dts.tmp
H A D.rk3399-puma-ddr1866.dtb.dts.tmp
H A D.rk3399-puma-ddr1333.dtb.dts.tmp
H A D.rk3399-firefly.dtb.dts.tmp
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399.dtsi56 #size-cells = <0>;
84 cpu_l0: cpu@0 {
87 reg = <0x0 0x0>;
99 reg = <0x0 0x1>;
111 reg = <0x0 0x2>;
123 reg = <0x0 0x3>;
135 reg = <0x0 0x100>;
147 reg = <0x0 0x101>;
162 arm,psci-suspend-param = <0x0010000>;
171 arm,psci-suspend-param = <0x1010000>;
[all …]