xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mtd/denali,nand.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/mtd/denali,nand.yaml#
5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml#
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Denali NAND controller
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - Masahiro Yamada <yamada.masahiro@socionext.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyunproperties:
13*4882a593Smuzhiyun  compatible:
14*4882a593Smuzhiyun    enum:
15*4882a593Smuzhiyun      - altr,socfpga-denali-nand
16*4882a593Smuzhiyun      - socionext,uniphier-denali-nand-v5a
17*4882a593Smuzhiyun      - socionext,uniphier-denali-nand-v5b
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun  reg-names:
20*4882a593Smuzhiyun    description: |
21*4882a593Smuzhiyun      There are two register regions:
22*4882a593Smuzhiyun        nand_data:  host data/command interface
23*4882a593Smuzhiyun        denali_reg: register interface
24*4882a593Smuzhiyun    items:
25*4882a593Smuzhiyun      - const: nand_data
26*4882a593Smuzhiyun      - const: denali_reg
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun  reg:
29*4882a593Smuzhiyun    minItems: 2
30*4882a593Smuzhiyun    maxItems: 2
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  interrupts:
33*4882a593Smuzhiyun    maxItems: 1
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun  clock-names:
36*4882a593Smuzhiyun    description: |
37*4882a593Smuzhiyun      There are three clocks:
38*4882a593Smuzhiyun        nand:   controller core clock
39*4882a593Smuzhiyun        nand_x: bus interface clock
40*4882a593Smuzhiyun        ecc:    ECC circuit clock
41*4882a593Smuzhiyun    items:
42*4882a593Smuzhiyun      - const: nand
43*4882a593Smuzhiyun      - const: nand_x
44*4882a593Smuzhiyun      - const: ecc
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  clocks:
47*4882a593Smuzhiyun    minItems: 3
48*4882a593Smuzhiyun    maxItems: 3
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun  reset-names:
51*4882a593Smuzhiyun    description: |
52*4882a593Smuzhiyun      There are two optional resets:
53*4882a593Smuzhiyun        nand: controller core reset
54*4882a593Smuzhiyun        reg:  register reset
55*4882a593Smuzhiyun    oneOf:
56*4882a593Smuzhiyun      - items:
57*4882a593Smuzhiyun          - const: nand
58*4882a593Smuzhiyun          - const: reg
59*4882a593Smuzhiyun      - const: nand
60*4882a593Smuzhiyun      - const: reg
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun  resets:
63*4882a593Smuzhiyun    minItems: 1
64*4882a593Smuzhiyun    maxItems: 2
65*4882a593Smuzhiyun
66*4882a593SmuzhiyunallOf:
67*4882a593Smuzhiyun  - $ref: nand-controller.yaml
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun  - if:
70*4882a593Smuzhiyun      properties:
71*4882a593Smuzhiyun        compatible:
72*4882a593Smuzhiyun          contains:
73*4882a593Smuzhiyun            const: altr,socfpga-denali-nand
74*4882a593Smuzhiyun    then:
75*4882a593Smuzhiyun      patternProperties:
76*4882a593Smuzhiyun        "^nand@[a-f0-9]$":
77*4882a593Smuzhiyun          type: object
78*4882a593Smuzhiyun          properties:
79*4882a593Smuzhiyun            nand-ecc-strength:
80*4882a593Smuzhiyun              enum:
81*4882a593Smuzhiyun                - 8
82*4882a593Smuzhiyun                - 15
83*4882a593Smuzhiyun            nand-ecc-step-size:
84*4882a593Smuzhiyun              enum:
85*4882a593Smuzhiyun                - 512
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun  - if:
88*4882a593Smuzhiyun      properties:
89*4882a593Smuzhiyun        compatible:
90*4882a593Smuzhiyun          contains:
91*4882a593Smuzhiyun            const: socionext,uniphier-denali-nand-v5a
92*4882a593Smuzhiyun    then:
93*4882a593Smuzhiyun      patternProperties:
94*4882a593Smuzhiyun        "^nand@[a-f0-9]$":
95*4882a593Smuzhiyun          type: object
96*4882a593Smuzhiyun          properties:
97*4882a593Smuzhiyun            nand-ecc-strength:
98*4882a593Smuzhiyun              enum:
99*4882a593Smuzhiyun                - 8
100*4882a593Smuzhiyun                - 16
101*4882a593Smuzhiyun                - 24
102*4882a593Smuzhiyun            nand-ecc-step-size:
103*4882a593Smuzhiyun              enum:
104*4882a593Smuzhiyun                - 1024
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun  - if:
107*4882a593Smuzhiyun      properties:
108*4882a593Smuzhiyun        compatible:
109*4882a593Smuzhiyun          contains:
110*4882a593Smuzhiyun            const: socionext,uniphier-denali-nand-v5b
111*4882a593Smuzhiyun    then:
112*4882a593Smuzhiyun      patternProperties:
113*4882a593Smuzhiyun        "^nand@[a-f0-9]$":
114*4882a593Smuzhiyun          type: object
115*4882a593Smuzhiyun          properties:
116*4882a593Smuzhiyun            nand-ecc-strength:
117*4882a593Smuzhiyun              enum:
118*4882a593Smuzhiyun                - 8
119*4882a593Smuzhiyun                - 16
120*4882a593Smuzhiyun            nand-ecc-step-size:
121*4882a593Smuzhiyun              enum:
122*4882a593Smuzhiyun                - 1024
123*4882a593Smuzhiyun
124*4882a593Smuzhiyunrequired:
125*4882a593Smuzhiyun  - compatible
126*4882a593Smuzhiyun  - reg
127*4882a593Smuzhiyun  - interrupts
128*4882a593Smuzhiyun  - clock-names
129*4882a593Smuzhiyun  - clocks
130*4882a593Smuzhiyun
131*4882a593SmuzhiyununevaluatedProperties: false
132*4882a593Smuzhiyun
133*4882a593Smuzhiyunexamples:
134*4882a593Smuzhiyun  - |
135*4882a593Smuzhiyun    nand-controller@ff900000 {
136*4882a593Smuzhiyun        compatible = "altr,socfpga-denali-nand";
137*4882a593Smuzhiyun        reg-names = "nand_data", "denali_reg";
138*4882a593Smuzhiyun        reg = <0xff900000 0x20>, <0xffb80000 0x1000>;
139*4882a593Smuzhiyun        interrupts = <0 144 4>;
140*4882a593Smuzhiyun        clock-names = "nand", "nand_x", "ecc";
141*4882a593Smuzhiyun        clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
142*4882a593Smuzhiyun        reset-names = "nand", "reg";
143*4882a593Smuzhiyun        resets = <&nand_rst>, <&nand_reg_rst>;
144*4882a593Smuzhiyun        #address-cells = <1>;
145*4882a593Smuzhiyun        #size-cells = <0>;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun        nand@0 {
148*4882a593Smuzhiyun                reg = <0>;
149*4882a593Smuzhiyun        };
150*4882a593Smuzhiyun    };
151