Searched +full:0 +full:x01c13000 (Results 1 – 12 of 12) sorted by relevance
61 reg = <0x01c13000 0x10>;
90 reg = <0x01c13000 0x0400>;91 clocks = <&ahb_gates 0>;94 phys = <&usbphy 0>;96 extcon = <&usbphy 0>;
12 #define SUNXI_SRAM_A1_BASE 0x0000000015 #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */16 #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */17 #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */18 #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */19 #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */21 #define SUNXI_DE2_BASE 0x0100000024 #define SUNXI_CPUCFG_BASE 0x0170000027 #define SUNXI_SRAMC_BASE 0x01c0000028 #define SUNXI_DRAMC_BASE 0x01c01000[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;78 #clock-cells = <0>;80 clock-frequency = <0>;84 #clock-cells = <0>;86 reg = <0x01c20050 0x4>;93 #clock-cells = <0>;100 osc32k: clk@0 {101 #clock-cells = <0>;[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;67 reg = <0x1>;73 reg = <0x2>;79 reg = <0x3>;85 reg = <0x100>;91 reg = <0x101>;97 reg = <0x102>;103 reg = <0x103>;[all …]
64 framebuffer@0 {110 #size-cells = <0>;111 cpu0: cpu@0 {114 reg = <0x0>;125 cooling-min-level = <0>;163 reg = <0x40000000 0x80000000>;178 #clock-cells = <0>;180 clock-frequency = <0>;184 #clock-cells = <0>;186 reg = <0x01c20050 0x4>;[all …]
66 framebuffer@0 {100 #size-cells = <0>;102 cpu0: cpu@0 {105 reg = <0>;119 cooling-min-level = <0>;163 reg = <0x40000000 0x80000000>;186 #clock-cells = <0>;188 reg = <0x01c20050 0x4>;194 #clock-cells = <0>;202 osc32k: clk@0 {[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;97 #clock-cells = <0>;104 #clock-cells = <0>;119 size = <0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;135 reg = <0x01c00000 0x30>;140 sram_a: sram@0 {142 reg = <0x00000000 0xc000>;[all …]
65 #size-cells = <0>;67 cpu0: cpu@0 {73 reg = <0x0>;82 reg = <0x1>;91 reg = <0x2>;100 reg = <0x3>;109 reg = <0x100>;118 reg = <0x101>;127 reg = <0x102>;136 reg = <0x103>;[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;167 #clock-cells = <0>;174 #clock-cells = <0>;200 size = <0x6000000>;201 alloc-ranges = <0x40000000 0x10000000>;215 reg = <0x01c00000 0x30>;220 sram_a: sram@0 {222 reg = <0x00000000 0xc000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;183 size = <0x6000000>;184 alloc-ranges = <0x40000000 0x10000000>;210 #clock-cells = <0>;217 #clock-cells = <0>;233 #clock-cells = <0>;240 #clock-cells = <0>;247 #clock-cells = <0>;[all …]