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/rk3399_rockchip-uboot/board/gdsys/mpc8308/
H A Dmpc8308.c5 * SPDX-License-Identifier: GPL-2.0+
30 return gd->arch.fpga_state[dev]; in get_fpga_state()
35 unsigned k; in board_early_init_f() local
37 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) in board_early_init_f()
38 gd->arch.fpga_state[k] = 0; in board_early_init_f()
45 unsigned k; in board_early_init_r() local
48 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) in board_early_init_r()
49 gd->arch.fpga_state[k] = 0; in board_early_init_r()
60 for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) { in board_early_init_r()
62 while (!mpc8308_get_fpga_done(k)) { in board_early_init_r()
[all …]
H A Dstrider.c5 * SPDX-License-Identifier: GPL-2.0+
28 #include "../common/ioep-fpga.h"
73 res = mclink_send(fpga - 1, regoff, data); in fpga_set_reg()
95 return -EINVAL; in fpga_get_reg()
96 res = mclink_receive(fpga - 1, regoff, data); in fpga_get_reg()
129 unsigned int k; in last_stage_init() local
151 for (k = 0; k < ARRAY_SIZE(mclink_controllers_dvi); ++k) { in last_stage_init()
156 if (i2c_probe(mclink_controllers[k])) { in last_stage_init()
158 if (i2c_probe(mclink_controllers[k])) in last_stage_init()
162 if (i2c_probe(mclink_controllers[k])) in last_stage_init()
[all …]
H A Dhrcon.c5 * SPDX-License-Identifier: GPL-2.0+
25 #include "../common/ioep-fpga.h"
70 res = mclink_send(fpga - 1, regoff, data); in fpga_set_reg()
92 return -EINVAL; in fpga_get_reg()
93 res = mclink_receive(fpga - 1, regoff, data); in fpga_get_reg()
126 unsigned int k; in last_stage_init() local
142 for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) { in last_stage_init()
145 if (i2c_probe(mclink_controllers[k])) in last_stage_init()
148 while (!(pca953x_get_val(mclink_controllers[k]) in last_stage_init()
152 printf("no done for mclink_controller %d\n", k); in last_stage_init()
[all …]
/rk3399_rockchip-uboot/lib/optee_clientApi/
H A DOpteeClientMem.c3 * hisping lin, <hisping.lin@rock-chips.com>
5 * SPDX-License-Identifier: GPL-2.0+
29 return -1; in my_malloc_init()
38 return -1; in my_malloc_init()
48 uint8_t k; in write_usedblock() local
49 for (k = 0; k < 50; k++) { in write_usedblock()
50 if (alloc_flags[k].used == 0) { in write_usedblock()
51 alloc_flags[k].used = 1; in write_usedblock()
52 alloc_flags[k].addrBlock = addr; in write_usedblock()
53 alloc_flags[k].sizeBlock = size; in write_usedblock()
[all …]
/rk3399_rockchip-uboot/board/gdsys/a38x/
H A Dcontrolcenterdc.c5 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm-generic/gpio.h>
17 #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h"
40 * be used by the DDR3 init code in the SPL U-Boot version to configure
82 uint k; in board_pex_config() local
85 if (!request_gpio_by_name(&gpio, "pca9698@22", 31, "fpga-program-gpio")) { in board_pex_config()
98 if (!request_gpio_by_name(&gpio, "pca9698@22", 19, "fpga-done-gpio")) { in board_pex_config()
99 for (k = 0; k < 20; ++k) { in board_pex_config()
101 printf("FPGA done after %u rounds\n", k); in board_pex_config()
109 if (!request_gpio_by_name(&gpio, "gpio@18100", 6, "cpu-to-fpga-reset")) { in board_pex_config()
[all …]
/rk3399_rockchip-uboot/include/
H A Dflash.h2 * (C) Copyright 2000-2005
5 * SPDX-License-Identifier: GPL-2.0+
15 /*-----------------------------------------------------------------------
46 const char *name; /* human-readable name */
51 #ifdef CONFIG_CFI_FLASH /* DM-specific parts */
121 /*-----------------------------------------------------------------------
135 /*-----------------------------------------------------------------------
141 /*-----------------------------------------------------------------------
146 /*-----------------------------------------------------------------------
154 #define STM_MANUFACT 0x00200020 /* STM (Thomson) manuf. ID in D23.. -"- */
[all …]
/rk3399_rockchip-uboot/include/configs/
H A Ddra7xx_evm.h9 * SPDX-License-Identifier: GPL-2.0+
54 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
58 "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \
59 "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \
60 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \
61 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \
62 "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \
64 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
71 "name=userdata,size=-,uuid=${uuid_gpt_userdata}"
115 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
[all …]
H A Dwb45n.h1 /* SPDX-License-Identifier: GPL-2.0+ */
40 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
68 /* bootstrap + u-boot + env + linux in nandflash */
78 "128K(at91bs)," \
79 "512K(u-boot)," \
80 "128K(u-boot-env)," \
81 "128K(redund-env)," \
82 "2560K(kernel-a)," \
83 "2560K(kernel-b)," \
84 "38912K(rootfs-a)," \
[all …]
H A Dap121.h2 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4 * SPDX-License-Identifier: GPL-2.0+
25 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
34 #define MTDIDS_DEFAULT "nor0=spi-flash.0"
35 #define MTDPARTS_DEFAULT "mtdparts=spi-flash.0:" \
36 "256k(u-boot),64k(u-boot-env)," \
37 "6144k(rootfs),1600k(uImage)," \
38 "64k(NVRAM),64k(ART)"
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Dclock_sun6i.c4 * (C) Copyright 2007-2012
10 * SPDX-License-Identifier: GPL-2.0+
30 clrsetbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK, in clock_init_safe()
32 clrsetbits_le32(&prcm->pll_ctrl1, ~PRCM_PLL_CTRL_LDO_KEY_MASK, in clock_init_safe()
35 clrbits_le32(&prcm->pll_ctrl1, PRCM_PLL_CTRL_LDO_KEY_MASK); in clock_init_safe()
40 writel(GENMASK(12, 0), &ccm->pll_lock_ctrl); in clock_init_safe()
45 writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); in clock_init_safe()
46 while (!(readl(&ccm->pll6_cfg) & CCM_PLL6_CTRL_LOCK)) in clock_init_safe()
49 writel(AHB1_ABP1_DIV_DEFAULT, &ccm->ahb1_apb1_div); in clock_init_safe()
51 writel(MBUS_CLK_DEFAULT, &ccm->mbus0_clk_cfg); in clock_init_safe()
[all …]
/rk3399_rockchip-uboot/drivers/gpio/
H A Dsh_pfc.c23 if (enum_id < r->begin) in enum_in_range()
26 if (enum_id > r->end) in enum_in_range()
74 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit()
77 dr->reg + offset, pos, dr->reg_width); in gpio_read_bit()
79 return (gpio_read_raw_reg(dr->mapped_reg + offset, in gpio_read_bit()
80 dr->reg_width) >> pos) & 1; in gpio_read_bit()
88 pos = dr->reg_width - (in_pos + 1); in gpio_write_bit()
92 dr->reg, !!value, pos, dr->reg_width); in gpio_write_bit()
95 __set_bit(pos, &dr->reg_shadow); in gpio_write_bit()
97 __clear_bit(pos, &dr->reg_shadow); in gpio_write_bit()
[all …]
/rk3399_rockchip-uboot/fs/jffs2/
H A Dmergesort.c3 * Rewritten from original source 2006 by Dan Merillat for use in u-boot.
8 * SPDX-License-Identifier: MIT
17 int k, psize, qsize; in sort_list() local
19 if (!list->listHead) in sort_list()
22 for (k = 1; k < list->listCount; k *= 2) { in sort_list()
23 tail = &list->listHead; in sort_list()
24 for (p = q = list->listHead; p; p = q) { in sort_list()
25 /* step 'k' places from p; */ in sort_list()
26 for (psize = 0; q && psize < k; psize++) in sort_list()
27 q = q->next; in sort_list()
[all …]
/rk3399_rockchip-uboot/configs/
H A Dtaurus_defconfig6 CONFIG_SPL_LDSCRIPT="arch/$(ARCH)/cpu/u-boot-spl.lds"
16 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
20 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
25 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9g10ek_nandflash_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
14 CONFIG_SYS_PROMPT="U-Boot> "
H A Dcorvus_defconfig12 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus"
16 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
21 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9g20ek_2mmc_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
12 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9rlek_nandflash_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare…
15 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9g20ek_nandflash_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
12 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9g20ek_2mmc_nandflash_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
12 CONFIG_SYS_PROMPT="U-Boot> "
H A Dat91sam9xeek_nandflash_defconfig10 …rintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare…
12 CONFIG_SYS_PROMPT="U-Boot> "
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/
H A DKconfig41 # Armada 7K and 8K are very similar - use only one Kconfig symbol for both
71 prompt "Armada XP/375/38x/3700/7K/8K board select"
84 bool "Support DB-88F6720 Armada 375"
88 bool "Support DB-88F6820-GP"
92 bool "Support DB-88F6820-AMC"
100 bool "Support Armada 7k/8k platforms"
106 bool "Support db-mv784mp-gp"
131 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
132 default "db-88f6720" if TARGET_DB_88F6720
133 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
[all …]
/rk3399_rockchip-uboot/fs/ubifs/
H A Dkey.h4 * Copyright (C) 2006-2008 Nokia Corporation.
6 * SPDX-License-Identifier: GPL-2.0+
13 * This header contains various key-related definitions and helper function.
20 * Keys are 64-bits long. First 32-bits are inode number (parent inode number
30 * key_mask_hash - mask a valid hash value.
46 * key_r5_hash - R5 hash function (borrowed from reiserfs).
66 * key_test_hash - testing hash function.
80 * ino_key_init - initialize inode key.
81 * @c: UBIFS file-system description object
88 key->u32[0] = inum; in ino_key_init()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-mvebu/armada8k/
H A Dcpu.c4 * SPDX-License-Identifier: GPL-2.0+
19 /* Armada 7k/8k */
25 * The following table includes all memory regions for Armada 7k and
26 * 8k SoCs. The Armada 7k is missing the CP110 slave regions here. Lets
28 * can be easier removed later dynamically if an Armada 7k device is detected.
29 * For a detailed memory map, please see doc/mvebu/armada-8k-memory.txt
35 /* SRAM, MMIO regions - CP110 slave region */
60 /* SRAM, MMIO regions - AP806 region */
68 /* SRAM, MMIO regions - CP110 master region */
93 * Armada 7k is not equipped with the CP110 slave CP. In case this in enable_caches()
[all …]
/rk3399_rockchip-uboot/board/gdsys/common/
H A Dosd.c5 * SPDX-License-Identifier: GPL-2.0+
42 FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
55 FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
161 / (1000000 - 100); in ics8n3qv01_get_fout_calc()
179 n -= 1; in ics8n3qv01_calc_parameters()
181 foutiic = fout - (fout / 10000); in ics8n3qv01_calc_parameters()
207 off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 1000000 in ics8n3qv01_set()
242 unsigned int k; in osd_write_videomem() local
244 for (k = 0; k < charcount; ++k) { in osd_write_videomem()
245 if (offset + k >= bufsize) in osd_write_videomem()
[all …]
H A Dmclink.c5 * SPDX-License-Identifier: GPL-2.0+
26 unsigned int k; in mclink_probe() local
29 for (k = 0; k < CONFIG_SYS_MCLINK_MAX; ++k) { in mclink_probe()
34 FPGA_GET_REG(k, mc_status, &mc_status); in mclink_probe()
39 FPGA_SET_REG(k, mc_control, 0x8000); in mclink_probe()
41 FPGA_GET_REG(k, mc_status, &mc_status); in mclink_probe()
48 FPGA_GET_REG(k, mc_status, &mc_status); in mclink_probe()
53 printf("waited %d us for mclink %d to come up\n", ctr * 100, k); in mclink_probe()
83 return -ETIMEDOUT; in mclink_send()
115 return -ETIMEDOUT; in mclink_receive()
[all …]

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