5  * SPDX-License-Identifier:	GPL-2.0+
14 #include <asm-generic/gpio.h>
17 #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h"
40  * be used by the DDR3 init code in the SPL U-Boot version to configure
82 	uint k;  in board_pex_config()  local
85 	if (!request_gpio_by_name(&gpio, "pca9698@22", 31, "fpga-program-gpio")) {  in board_pex_config()
98 	if (!request_gpio_by_name(&gpio, "pca9698@22", 19, "fpga-done-gpio")) {  in board_pex_config()
99 		for (k = 0; k < 20; ++k) {  in board_pex_config()
101 				printf("FPGA done after %u rounds\n", k);  in board_pex_config()
109 	if (!request_gpio_by_name(&gpio, "gpio@18100", 6, "cpu-to-fpga-reset")) {  in board_pex_config()
115 	if (!request_gpio_by_name(&gpio, "pca9698@22", 27, "fpga-ready-gpio")) {  in board_pex_config()
116 		for (k = 0; k < 2; ++k) {  in board_pex_config()
162 	gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;  in board_init()
170 	uint k;  in init_host_phys()  local
172 	for (k = 0; k < 2; ++k) {  in init_host_phys()
175 		phydev = phy_find_by_mask(bus, 1 << k,  in init_host_phys()
185 	uint k;  in ccdc_eth_init()  local
218 	/* reset all FPGA-QSGMII instances */  in ccdc_eth_init()
219 	for (k = 0; k < 80; ++k)  in ccdc_eth_init()
220 		writel(1 << 31, get_fpga()->qsgmii_port_state[k]);  in ccdc_eth_init()
224 	for (k = 0; k < 80; ++k)  in ccdc_eth_init()
225 		writel(0, get_fpga()->qsgmii_port_state[k]);  in ccdc_eth_init()
242 	uint k;  in board_fix_fdt()  local
253 	for (k = 0x21; k <= 0x26; k++) {  in board_fix_fdt()
255 			 "/soc/internal-regs/i2c@11000/pca9698@%02x", k);  in board_fix_fdt()
257 		if (!dm_i2c_simple_probe(bus, k))  in board_fix_fdt()