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Searched defs:reg (Results 1 – 25 of 194) sorted by relevance

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/rk3399_ARM-atf/include/lib/el3_runtime/
H A Dcontext_el1.h191 #define read_el1_ctx_common(ctx, reg) (((ctx)->common).reg) argument
193 #define write_el1_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
196 #define write_el1_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
199 #define read_el1_ctx_arch_timer(ctx, reg) (((ctx)->arch_timer).reg) argument
200 #define write_el1_ctx_arch_timer(ctx, reg, val) ((((ctx)->arch_timer).reg) \ argument
204 #define read_el1_ctx_aarch32(ctx, reg) (((ctx)->el1_aarch32).reg) argument
205 #define write_el1_ctx_aarch32(ctx, reg, val) ((((ctx)->el1_aarch32).reg) \ argument
208 #define read_el1_ctx_aarch32(ctx, reg) ULL(0) argument
209 #define write_el1_ctx_aarch32(ctx, reg, val) argument
213 #define read_el1_ctx_mte2(ctx, reg) (((ctx)->mte2).reg) argument
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H A Dcontext_el2.h231 #define read_el2_ctx_common(ctx, reg) (((ctx)->common).reg) argument
233 #define write_el2_ctx_common(ctx, reg, val) ((((ctx)->common).reg) \ argument
236 #define write_el2_ctx_common_sysreg128(ctx, reg, val) ((((ctx)->common).reg) \ argument
240 #define read_el2_ctx_mte2(ctx, reg) (((ctx)->mte2).reg) argument
241 #define write_el2_ctx_mte2(ctx, reg, val) ((((ctx)->mte2).reg) \ argument
244 #define read_el2_ctx_mte2(ctx, reg) ULL(0) argument
245 #define write_el2_ctx_mte2(ctx, reg, val) argument
249 #define read_el2_ctx_fgt(ctx, reg) (((ctx)->fgt).reg) argument
250 #define write_el2_ctx_fgt(ctx, reg, val) ((((ctx)->fgt).reg) \ argument
253 #define read_el2_ctx_fgt(ctx, reg) ULL(0) argument
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/rk3399_ARM-atf/drivers/renesas/rzg/pfc/
H A Dpfc_init.c31 #define PRR_PRODUCT_ERR(reg) \ argument
38 #define PRR_CUT_ERR(reg) \ argument
47 uint32_t reg; in rzg_pfc_init() local
/rk3399_ARM-atf/drivers/renesas/rcar/pfc/
H A Dpfc_init.c40 #define PRR_PRODUCT_ERR(reg) \ argument
47 #define PRR_CUT_ERR(reg) \ argument
56 uint32_t reg; in rcar_pfc_init() local
/rk3399_ARM-atf/lib/extensions/sme/
H A Dsme.c19 u_register_t reg; in sme_enable() local
33 u_register_t reg; in sme_enable_per_world() local
80 u_register_t reg; in sme_disable() local
94 u_register_t reg; in sme_disable_per_world() local
/rk3399_ARM-atf/drivers/cadence/nand/
H A Dcdns_nand.c34 uint32_t reg = 0U; in cdns_nand_wait_idle() local
45 uint32_t reg = 0U; in cdns_nand_wait_thread_ready() local
71 uint32_t reg = 0U; in cdns_nand_last_opr_status() local
114 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_set_feature() local
136 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_reset() local
211 uint32_t reg = 0U; in cdns_nand_update_dev_info() local
274 uint32_t reg = 0U; in cdns_nand_host_init() local
334 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_erase() local
396 uint32_t reg = (CNF_WORK_MODE_PIO << CNF_CMDREG0_CT); in cdns_nand_read_page() local
/rk3399_ARM-atf/drivers/renesas/rzg/qos/
H A Dqos_init.c45 #define PRR_PRODUCT_ERR(reg) \ argument
52 #define PRR_CUT_ERR(reg) \ argument
61 uint32_t reg; in rzg_qos_init() local
196 uint32_t reg; in get_refperiod() local
/rk3399_ARM-atf/drivers/renesas/rcar/qos/
H A Dqos_init.c61 #define PRR_PRODUCT_ERR(reg) \ argument
68 #define PRR_CUT_ERR(reg) \ argument
77 uint32_t reg; in rcar_qos_init() local
300 uint32_t reg; in get_refperiod() local
/rk3399_ARM-atf/plat/imx/common/sci/
H A Dimx8_mu.c13 uint32_t reg, i; in MU_Resume() local
28 uint32_t reg = mmio_read_32(base + MU_ACR_OFFSET1); in MU_EnableRxFullInt() local
37 uint32_t reg = mmio_read_32(base + MU_ACR_OFFSET1); in MU_EnableGeneralInt() local
66 uint32_t reg; in MU_Init() local
/rk3399_ARM-atf/include/services/
H A Ddrtm_svc.h118 #define ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(reg, val) \ argument
126 #define ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(reg, val) \ argument
134 #define ARM_DRTM_TPM_FEATURES_SET_FW_HASH(reg, val) \ argument
142 #define ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(reg, val) \ argument
150 #define ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(reg, val) \ argument
159 #define ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(reg, val) \ argument
168 #define ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(reg, val) \ argument
177 #define ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(reg, val) \ argument
187 #define ARM_DRTM_DLME_IMG_AUTH_SUPPORT(reg, val) \ argument
216 #define ARM_DRTM_REGION_SIZE_TYPE_SET_CACHEABILITY(reg, val) \ argument
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/rk3399_ARM-atf/lib/extensions/tcr/
H A Dtcr2.c14 u_register_t reg; in tcr2_enable() local
30 u_register_t reg; in tcr2_disable() local
/rk3399_ARM-atf/drivers/brcm/mdio/
H A Dmdio.c31 static int mdio_op(uint16_t busid, uint16_t phyid, uint32_t reg, in mdio_op()
67 int mdio_write(uint16_t busid, uint16_t phyid, uint32_t reg, uint16_t val) in mdio_write()
78 int mdio_read(uint16_t busid, uint16_t phyid, uint32_t reg) in mdio_read()
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/
H A Dpmic_psc.c23 const struct pmic_psc_reg *reg; in read_pmic_psc_reg() local
35 const struct pmic_psc_reg *reg; in set_pmic_psc_reg() local
47 const struct pmic_psc_reg *reg; in clr_pmic_psc_reg() local
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spmc/
H A Dmtspmc.c42 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_enable_cpu_auto_off() local
50 uintptr_t reg = per_cpu(cluster, cpu, MCUCFG_SPARK); in spm_disable_cpu_auto_off() local
75 uintptr_t reg; in mcucfg_set_bootaddr() local
92 uintptr_t reg; in mcucfg_get_bootaddr() local
109 uintptr_t reg; in mcucfg_init_archstate() local
/rk3399_ARM-atf/lib/extensions/idte/
H A Didte3.c19 percpu_idregs_t * const reg = in idte3_init_percpu_once_regs() local
42 perworld_idregs_t *reg = &(per_world_ctx->idregs); in idte3_init_cached_idregs_per_world() local
280 u_register_t reg; in idte3_enable() local
/rk3399_ARM-atf/lib/extensions/sve/
H A Dsve.c43 u_register_t reg; in sve_init_el2_unused() local
60 u_register_t reg; in sve_disable_per_world() local
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/
H A Dcm3_system_reset.c37 static inline uint32_t a3700_gicd_read(uint32_t reg) in a3700_gicd_read()
42 static inline void a3700_gicd_write(uint32_t reg, uint32_t value) in a3700_gicd_write()
77 static inline uint32_t a3700_gicr_read(unsigned int proc, uint32_t reg) in a3700_gicr_read()
82 static inline void a3700_gicr_write(unsigned int proc, uint32_t reg, in a3700_gicr_write()
/rk3399_ARM-atf/drivers/renesas/rcar/cpld/
H A Dulcb_cpld.c36 uint32_t reg; in gpio_set_value() local
48 uint32_t reg; in gpio_direction_output() local
57 uint32_t reg; in gpio_pfc() local
/rk3399_ARM-atf/drivers/allwinner/axp/
H A Dcommon.c32 int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask) in axp_clrsetbits()
79 const struct axp_regulator *reg) in setup_regulator()
166 const struct axp_regulator *reg; in axp_setup_regulators() local
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhisi_pwrc.c42 unsigned int reg = 0; in hisi_pwrc_set_cluster_wfi() local
72 unsigned int reg, sec_entrypoint; in hisi_pwrc_setup() local
/rk3399_ARM-atf/plat/allwinner/sun50i_h616/
H A Dsunxi_power.c50 int axp_read(uint8_t reg) in axp_read()
71 int axp_write(uint8_t reg, uint8_t val) in axp_write()
145 uint32_t reg; in sunxi_pmic_setup() local
/rk3399_ARM-atf/plat/mediatek/drivers/pmic/mt6363/
H A Dmt6363_psc.c25 static int mt6363_psc_read_field(uint32_t reg, uint32_t *val, uint32_t mask, uint32_t shift) in mt6363_psc_read_field()
44 static int mt6363_psc_write_field(uint32_t reg, uint32_t val, uint32_t mask, uint32_t shift) in mt6363_psc_write_field()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mq/
H A Dgpc.c58 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4; in gpc_save_imr_lpm() local
70 uint32_t reg = gpc_imr_offset[core_id] + imr_idx * 4; in gpc_restore_imr_lpm() local
110 uintptr_t reg; in imx_gpc_hwirq_mask() local
127 uintptr_t reg; in imx_gpc_hwirq_unmask() local
185 uintptr_t reg; in imx_gpc_set_affinity() local
/rk3399_ARM-atf/plat/nvidia/tegra/drivers/bpmp_ipc/
H A Dintf.c38 static inline uint32_t hsp_db_read(uint32_t reg) in hsp_db_read()
43 static inline void hsp_db_write(uint32_t reg, uint32_t val) in hsp_db_write()
108 uint32_t reg; in tegra_bpmp_enable_ccplex_doorbell() local
134 uint32_t reg; in tegra_bpmp_can_ccplex_ring_doorbell() local
/rk3399_ARM-atf/plat/renesas/common/
H A Dbl2_secure_setting.c18 uint32_t reg; member
265 uint32_t reg; member

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