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Searched defs:clk (Results 1 – 25 of 244) sorted by relevance

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/rk3399_rockchip-uboot/drivers/clk/
H A Dclk-uclass.c27 struct phandle_1_arg *cells, struct clk *clk) in clk_get_by_index_platdata()
41 static int clk_of_xlate_default(struct clk *clk, in clk_of_xlate_default()
60 int index, struct clk *clk) in clk_get_by_indexed_prop()
103 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk) in clk_get_by_index()
143 struct clk clk, parent_clk; in clk_set_default_parents() local
194 struct clk clk; in clk_set_default_rates() local
259 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk) in clk_get_by_name()
275 int clk_release_all(struct clk *clk, int count) in clk_release_all()
300 int clk_request(struct udevice *dev, struct clk *clk) in clk_request()
314 int clk_free(struct clk *clk) in clk_free()
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H A Dclk_scmi.c12 static int scmi_clk_gate(struct clk *clk, int enable) in scmi_clk_gate()
31 static int scmi_clk_enable(struct clk *clk) in scmi_clk_enable()
36 static int scmi_clk_disable(struct clk *clk) in scmi_clk_disable()
41 static ulong scmi_clk_get_rate(struct clk *clk) in scmi_clk_get_rate()
63 static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) in scmi_clk_set_rate()
H A Dclk_sandbox.c18 static ulong sandbox_clk_get_rate(struct clk *clk) in sandbox_clk_get_rate()
28 static ulong sandbox_clk_set_rate(struct clk *clk, ulong rate) in sandbox_clk_set_rate()
45 static int sandbox_clk_enable(struct clk *clk) in sandbox_clk_enable()
57 static int sandbox_clk_disable(struct clk *clk) in sandbox_clk_disable()
/rk3399_rockchip-uboot/drivers/clk/tegra/
H A Dtegra-car-clk.c13 static int tegra_car_clk_request(struct clk *clk) in tegra_car_clk_request()
32 static int tegra_car_clk_free(struct clk *clk) in tegra_car_clk_free()
40 static ulong tegra_car_clk_get_rate(struct clk *clk) in tegra_car_clk_get_rate()
51 static ulong tegra_car_clk_set_rate(struct clk *clk, ulong rate) in tegra_car_clk_set_rate()
62 static int tegra_car_clk_enable(struct clk *clk) in tegra_car_clk_enable()
72 static int tegra_car_clk_disable(struct clk *clk) in tegra_car_clk_disable()
H A Dtegra186-clk.c13 static ulong tegra186_clk_get_rate(struct clk *clk) in tegra186_clk_get_rate()
32 static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate) in tegra186_clk_set_rate()
52 static int tegra186_clk_en_dis(struct clk *clk, in tegra186_clk_en_dis()
69 static int tegra186_clk_enable(struct clk *clk) in tegra186_clk_enable()
77 static int tegra186_clk_disable(struct clk *clk) in tegra186_clk_disable()
/rk3399_rockchip-uboot/include/
H A Dclk.h54 struct clk { struct
76 struct clk *clks; argument
150 struct clk *clk) in clk_get_by_index()
161 struct clk *clk) in clk_get_by_name()
166 static inline int clk_release_all(struct clk *clk, int count) in clk_release_all()
326 static inline bool clk_valid(struct clk *clk) in clk_valid()
/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dclock.c188 struct exynos4_clock *clk = in exynos4_get_pll_clk() local
218 struct exynos4x12_clock *clk = in exynos4x12_get_pll_clk() local
248 struct exynos5_clock *clk = in exynos5_get_pll_clk() local
307 struct exynos5420_clock *clk = in exynos542x_get_pll_clk() local
370 struct exynos5_clock *clk = in exynos5_get_periph_rate() local
469 struct exynos5420_clock *clk = in exynos542x_get_periph_rate() local
572 struct exynos4_clock *clk = in exynos4_get_arm_clk() local
594 struct exynos4x12_clock *clk = in exynos4x12_get_arm_clk() local
616 struct exynos5_clock *clk = in exynos5_get_arm_clk() local
638 struct exynos4_clock *clk = in exynos4_get_pwm_clk() local
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H A Dclock_init_exynos5.c552 struct exynos5_clock *clk = in exynos5250_system_clock_init() local
787 struct exynos5420_clock *clk = in exynos5420_system_clock_init() local
982 struct exynos5_clock *clk = in clock_init_dp_clock() local
998 struct exynos5_clock *clk = in emmc_boot_clk_div_set() local
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx7ulp/
H A Dpcc.c84 int pcc_clock_enable(enum pcc_clk clk, bool enable) in pcc_clock_enable()
114 int pcc_clock_sel(enum pcc_clk clk, enum scg_clk src) in pcc_clock_sel()
163 int pcc_clock_div_config(enum pcc_clk clk, bool frac, u8 div) in pcc_clock_div_config()
199 bool pcc_clock_is_enable(enum pcc_clk clk) in pcc_clock_is_enable()
215 int pcc_clock_get_clksrc(enum pcc_clk clk, enum scg_clk *src) in pcc_clock_get_clksrc()
256 u32 pcc_clock_get_rate(enum pcc_clk clk) in pcc_clock_get_rate()
H A Dscg.c55 static u32 scg_sircdiv_get_rate(enum scg_clk clk) in scg_sircdiv_get_rate()
93 static u32 scg_fircdiv_get_rate(enum scg_clk clk) in scg_fircdiv_get_rate()
131 static u32 scg_soscdiv_get_rate(enum scg_clk clk) in scg_soscdiv_get_rate()
169 static u32 scg_apll_pfd_get_rate(enum scg_clk clk) in scg_apll_pfd_get_rate()
219 static u32 scg_spll_pfd_get_rate(enum scg_clk clk) in scg_spll_pfd_get_rate()
356 static u32 scg_nic_get_rate(enum scg_clk clk) in scg_nic_get_rate()
429 static u32 scg_sys_get_rate(enum scg_clk clk) in scg_sys_get_rate()
558 u32 scg_clk_get_rate(enum scg_clk clk) in scg_clk_get_rate()
618 int scg_enable_pll_pfd(enum scg_clk clk, u32 frac) in scg_enable_pll_pfd()
1063 void scg_a7_sys_clk_sel(enum scg_sys_src clk) in scg_a7_sys_clk_sel()
/rk3399_rockchip-uboot/drivers/video/
H A Dipu.h23 struct clk { struct
26 /* Source clock this clk depends on */ argument
27 struct clk *parent; argument
29 struct clk *secondary; argument
43 void (*recalc) (struct clk *); argument
49 int (*set_rate) (struct clk *, unsigned long); argument
54 unsigned long (*round_rate) (struct clk *, unsigned long); argument
59 int (*enable) (struct clk *); argument
64 void (*disable) (struct clk *); argument
66 int (*set_parent) (struct clk *, struct clk *); argument
H A Dipu_common.c84 void clk_enable(struct clk *clk) in clk_enable()
93 void clk_disable(struct clk *clk) in clk_disable()
103 int clk_get_usecount(struct clk *clk) in clk_get_usecount()
111 u32 clk_get_rate(struct clk *clk) in clk_get_rate()
119 struct clk *clk_get_parent(struct clk *clk) in clk_get_parent()
127 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate()
134 long clk_round_rate(struct clk *clk, unsigned long rate) in clk_round_rate()
142 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent()
150 static int clk_ipu_enable(struct clk *clk) in clk_ipu_enable()
172 static void clk_ipu_disable(struct clk *clk) in clk_ipu_disable()
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/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Dclock_sun9i.c86 void clock_set_pll1(unsigned int clk) in clock_set_pll1()
113 void clock_set_pll2(unsigned int clk) in clock_set_pll2()
134 void clock_set_pll6(unsigned int clk) in clock_set_pll6()
148 void clock_set_pll12(unsigned int clk) in clock_set_pll12()
163 void clock_set_pll4(unsigned int clk) in clock_set_pll4()
H A Dclock_sun6i.c111 void clock_set_pll1(unsigned int clk) in clock_set_pll1()
149 void clock_set_pll3(unsigned int clk) in clock_set_pll3()
182 void clock_set_pll5(unsigned int clk, bool sigma_delta_enable) in clock_set_pll5()
214 void clock_set_mipi_pll(unsigned int clk) in clock_set_mipi_pll()
255 void clock_set_pll10(unsigned int clk) in clock_set_pll10()
279 void clock_set_pll11(unsigned int clk, bool sigma_delta_enable) in clock_set_pll11()
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3308.c196 static ulong rk3308_i2c_get_clk(struct clk *clk) in rk3308_i2c_get_clk()
226 static ulong rk3308_i2c_set_clk(struct clk *clk, uint hz) in rk3308_i2c_set_clk()
260 static ulong rk3308_mac_set_clk(struct clk *clk, uint hz) in rk3308_mac_set_clk()
290 static int rk3308_mac_set_speed_clk(struct clk *clk, uint hz) in rk3308_mac_set_speed_clk()
306 static ulong rk3308_mmc_get_clk(struct clk *clk) in rk3308_mmc_get_clk()
336 static ulong rk3308_mmc_set_clk(struct clk *clk, ulong set_rate) in rk3308_mmc_set_clk()
380 static ulong rk3308_saradc_get_clk(struct clk *clk) in rk3308_saradc_get_clk()
392 static ulong rk3308_saradc_set_clk(struct clk *clk, uint hz) in rk3308_saradc_set_clk()
408 static ulong rk3308_tsadc_get_clk(struct clk *clk) in rk3308_tsadc_get_clk()
420 static ulong rk3308_tsadc_set_clk(struct clk *clk, uint hz) in rk3308_tsadc_set_clk()
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H A Dclk_rk322x.c576 static ulong rk322x_clk_get_rate(struct clk *clk) in rk322x_clk_get_rate()
637 static ulong rk322x_clk_set_rate(struct clk *clk, ulong rate) in rk322x_clk_set_rate()
711 static int rk322x_gmac_set_parent(struct clk *clk, struct clk *parent) in rk322x_gmac_set_parent()
739 static int rk322x_gmac_extclk_set_parent(struct clk *clk, struct clk *parent) in rk322x_gmac_extclk_set_parent()
764 static int rk322x_lcdc_set_parent(struct clk *clk, struct clk *parent) in rk322x_lcdc_set_parent()
789 static int rk322x_clk_set_parent(struct clk *clk, struct clk *parent) in rk322x_clk_set_parent()
818 int rk322x_mmc_get_phase(struct clk *clk) in rk322x_mmc_get_phase()
854 int rk322x_mmc_set_phase(struct clk *clk, u32 degrees) in rk322x_mmc_set_phase()
899 static int rk322x_clk_get_phase(struct clk *clk) in rk322x_clk_get_phase()
917 static int rk322x_clk_set_phase(struct clk *clk, int degrees) in rk322x_clk_set_phase()
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/rk3399_rockchip-uboot/arch/arm/mach-s5pc1xx/
H A Dclock.c28 struct s5pc100_clock *clk = in s5pc100_get_pll_clk() local
79 struct s5pc110_clock *clk = in s5pc110_get_pll_clk() local
136 struct s5pc110_clock *clk = in s5pc110_get_arm_clk() local
156 struct s5pc100_clock *clk = in s5pc100_get_arm_clk() local
178 struct s5pc100_clock *clk = in get_hclk() local
195 struct s5pc100_clock *clk = in get_pclkd1() local
216 struct s5pc110_clock *clk = in get_hclk_sys() local
245 struct s5pc110_clock *clk = in get_pclk_sys() local
/rk3399_rockchip-uboot/drivers/clk/at91/
H A Dclk-slow.c12 static int at91_slow_clk_enable(struct clk *clk) in at91_slow_clk_enable()
17 static ulong at91_slow_clk_get_rate(struct clk *clk) in at91_slow_clk_get_rate()
H A Dclk-main.c17 static int main_osc_clk_enable(struct clk *clk) in main_osc_clk_enable()
28 static ulong main_osc_clk_get_rate(struct clk *clk) in main_osc_clk_get_rate()
H A Dclk-plla.c17 static int plla_clk_enable(struct clk *clk) in plla_clk_enable()
28 static ulong plla_clk_get_rate(struct clk *clk) in plla_clk_get_rate()
H A Dclk-utmi.c19 static int utmi_clk_enable(struct clk *clk) in utmi_clk_enable()
40 static ulong utmi_clk_get_rate(struct clk *clk) in utmi_clk_get_rate()
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand_compat.c8 struct clk *clk; in devm_clk_get() local
26 int clk_prepare_enable(struct clk *clk) in clk_prepare_enable()
31 void clk_disable_unprepare(struct clk *clk) in clk_disable_unprepare()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm281xx/
H A Dclk-core.h31 struct clk *clk; member
58 struct clk { struct
59 struct clk *parent; argument
67 struct clk_src *src; argument
68 struct clk_ops *ops; argument
70 unsigned long ccu_clk_mgr_base; argument
74 struct refclk *refclk_str_to_clk(const char *name); argument
411 struct clk clk; member
415 struct clk clk; member
420 struct clk clk; member
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/rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm235xx/
H A Dclk-core.h31 struct clk *clk; member
58 struct clk { struct
59 struct clk *parent; argument
67 struct clk_src *src; argument
68 struct clk_ops *ops; argument
70 unsigned long ccu_clk_mgr_base; argument
74 struct refclk *refclk_str_to_clk(const char *name); argument
411 struct clk clk; member
415 struct clk clk; member
420 struct clk clk; member
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/rk3399_rockchip-uboot/drivers/clk/uniphier/
H A Dclk-uniphier-core.c28 static int uniphier_clk_enable(struct clk *clk) in uniphier_clk_enable()
64 static ulong uniphier_clk_get_rate(struct clk *clk) in uniphier_clk_get_rate()
87 static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate) in uniphier_clk_set_rate()

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