| 156a6e13 | 01-Jul-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(drivers/mtd): macronix quad enable bit issue" into integration |
| 80000975 | 01-Jul-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs: update maintainer entry for nxp platform code" into integration |
| 8d148183 | 01-Jul-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(measured boot): remove weak definition of plat_get_measured_boot_data()" into integration |
| c04cb15c | 17-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(measured boot): remove weak definition of plat_get_measured_boot_data()
Weak definitions are confusing and should be avoided if possible. Thus, turn plat_get_measured_boot_data() into a str
refactor(measured boot): remove weak definition of plat_get_measured_boot_data()
Weak definitions are confusing and should be avoided if possible. Thus, turn plat_get_measured_boot_data() into a strong definition that platforms must provide (if they need measured boot).
We could have moved the old weak implementation under plat/common as a sane, default implementation that platforms may pull in if it suits them. However, this implementation right now simply measures BL2, which is not enough to get a complete measured boot flow, so this patch just removes it.
This change only affects the Arm FVP platform, as no other upstream platform implements measured boot at the moment.
Change-Id: If8680a39ae0ef1044ee981315439d5e0c8461229 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 75569c30 | 25-Mar-2021 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
docs: update maintainer entry for nxp platform code
Add maintainer entry for NXP platform code
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Change-Id: Idd5407b8a9c1aa50ba812b2b1a7ce45e8fac5027 |
| c25ff16e | 29-Sep-2020 |
Patrick Delaunay <patrick.delaunay@st.com> |
refactor(plat/st): add stm32image_io_setup
Add a generic function to setup the stm32image IO.
Change-Id: I0f7cf4a6030605037643f3119b809e0319d926af Signed-off-by: Patrick Delaunay <patrick.delaunay@
refactor(plat/st): add stm32image_io_setup
Add a generic function to setup the stm32image IO.
Change-Id: I0f7cf4a6030605037643f3119b809e0319d926af Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 71693a66 | 30-Jun-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(plat/st): panic if boot interface is wrong
Add a panic() at the end of stm32mp_io_setup() if the boot interface given in ROM code boot context is not supported.
Change-Id: I0d50f21a11231febd210
fix(plat/st): panic if boot interface is wrong
Add a panic() at the end of stm32mp_io_setup() if the boot interface given in ROM code boot context is not supported.
Change-Id: I0d50f21a11231febd21041b6e63108cc3e6f4f0c Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| c1c14b34 | 30-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1" into integration |
| 00aa63d1 | 30-Jun-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "tc0_tfa_v25" into integration
* changes: fix(tc0): remove ffa and optee device tree node fix(tc0): set cactus-tertiary vcpu count to 1 fix(tc0): change UUID to string
Merge changes from topic "tc0_tfa_v25" into integration
* changes: fix(tc0): remove ffa and optee device tree node fix(tc0): set cactus-tertiary vcpu count to 1 fix(tc0): change UUID to string format
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| 81a8b2da | 30-Jun-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "feat(sve): enable SVE for the secure world" into integration |
| 204fd991 | 29-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "errata: workaround for Cortex A77 errata 1791578" into integration |
| 64dd1dee | 10-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
refactor(plat/fvp): tidy up list of images to measure
We don't ever expect to load a binary with an STM32 header on the Arm FVP platform so remove this type of image from the list of measurements.
refactor(plat/fvp): tidy up list of images to measure
We don't ever expect to load a binary with an STM32 header on the Arm FVP platform so remove this type of image from the list of measurements.
Also remove the GPT image type from the list, as it does not get measured. GPT is a container, just like FIP is. We don't measure the FIP but rather the images inside it. It would seem logical to treat GPT the same way.
Besides, only images that get loaded through load_auth_image() get measured right now. GPT processing happens before that and is handled in a different way (see partition_init()).
Change-Id: Iac4de75380ed625b228e69ee4564cf9e67e19336 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| cc255b9f | 10-Jun-2021 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs: explain Measured Boot dependency on Trusted Boot
Change-Id: I04d9439d5967e93896dfdb0f3d7b0aec96c743f9 Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> |
| 7285fd5f | 10-Jun-2021 |
Manish Pandey <manish.pandey2@arm.com> |
feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1
For Arm platforms PIE is enabled when RESET_TO_BL31=1 in aarch64 mode on the similar lines enable PIE when RESET_TO_SP_MIN=1 in aarch32 mode. The un
feat(plat/arm): enable PIE when RESET_TO_SP_MIN=1
For Arm platforms PIE is enabled when RESET_TO_BL31=1 in aarch64 mode on the similar lines enable PIE when RESET_TO_SP_MIN=1 in aarch32 mode. The underlying changes for enabling PIE in aarch32 is submitted in commit 4324a14bf
Signed-off-by: Manish Pandey <manish.pandey2@arm.com> Change-Id: Ib8bb860198b3f97cdc91005503a3184d63e15469
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| b9f7fcc9 | 28-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration
* changes: feat(tc0): add cpu capacity to provide scheduling information fix(tc0): remove "arm,psci" from psci node feat(tc0): upda
Merge changes I8d334231,Icd1ce8ec,Ic963c21c into integration
* changes: feat(tc0): add cpu capacity to provide scheduling information fix(tc0): remove "arm,psci" from psci node feat(tc0): update mhuv2 dts node to align with upstream driver
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| ce36b311 | 28-Jun-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(drivers/mtd): fix MISRA issues and logic improvement" into integration |
| 99ea2e91 | 28-Jun-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "style(scmi_common): add \n to warning messages" into integration |
| 309f5938 | 14-Jun-2021 |
Usama Arif <usama.arif@arm.com> |
feat(tc0): add cpu capacity to provide scheduling information
Signed-off-by: Usama Arif <usama.arif@arm.com> Change-Id: I8d3342315a46c78b4c41582ec114f0364a194316 |
| 814646b4 | 27-May-2021 |
Usama Arif <usama.arif@arm.com> |
fix(tc0): remove "arm,psci" from psci node
"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which arent present in the device tree, so remove it from psci compatible.
Signed-off-by:
fix(tc0): remove "arm,psci" from psci node
"arm,psci" expects the FIDs for cpu-on, cpu-off and cpu-suspend, which arent present in the device tree, so remove it from psci compatible.
Signed-off-by: Usama Arif <usama.arif@arm.com> Change-Id: Icd1ce8ec7fd3f270925e4b3d5d0187088ffe4ba5
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| 63067ce8 | 27-May-2021 |
Usama Arif <usama.arif@arm.com> |
feat(tc0): update mhuv2 dts node to align with upstream driver
The MHUv2 driver has been merged upstream, and it has a different dts format compared to what was previously used. This patch aligns wi
feat(tc0): update mhuv2 dts node to align with upstream driver
The MHUv2 driver has been merged upstream, and it has a different dts format compared to what was previously used. This patch aligns with the upstream driver.
Signed-off-by: Usama Arif <usama.arif@arm.com> Change-Id: Ic963c21c1475d301c3a75686718e6e17841831c3
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| 02f70317 | 28-Jun-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(makefile): use space in WARNINGS list" into integration |
| 0c5e7d1c | 22-Mar-2021 |
Max Shvetsov <maksims.svecovs@arm.com> |
feat(sve): enable SVE for the secure world
Enables SVE support for the secure world via ENABLE_SVE_FOR_SWD. ENABLE_SVE_FOR_SWD defaults to 0 and has to be explicitly set by the platform. SVE is conf
feat(sve): enable SVE for the secure world
Enables SVE support for the secure world via ENABLE_SVE_FOR_SWD. ENABLE_SVE_FOR_SWD defaults to 0 and has to be explicitly set by the platform. SVE is configured during initial setup and then uses EL3 context save/restore routine to switch between SVE configurations for different contexts. Reset value of CPTR_EL3 changed to be most restrictive by default.
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I889fbbc2e435435d66779b73a2d90d1188bf4116
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| f1b44a90 | 27-May-2021 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
fix(tc0): remove ffa and optee device tree node
As FF-A driver probes OP-TEE SP dynamically, these entries are no more required.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
fix(tc0): remove ffa and optee device tree node
As FF-A driver probes OP-TEE SP dynamically, these entries are no more required.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: Ica091722a7fad13e02662b9b2cd11ca1879b9f80
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| 05f667f0 | 27-May-2021 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
fix(tc0): set cactus-tertiary vcpu count to 1
Third instance of cactus is a UP SP. Set its vcpu count to 1.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: I34b7feb2
fix(tc0): set cactus-tertiary vcpu count to 1
Third instance of cactus is a UP SP. Set its vcpu count to 1.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: I34b7feb2915e6d335e690e89dea466e75944ed1b
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| 1c195365 | 27-May-2021 |
Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> |
fix(tc0): change UUID to string format
Change OP-TEE, Cactus SPs UUID to string format
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: I32dbf40e4c5aa959bb92d3e853072
fix(tc0): change UUID to string format
Change OP-TEE, Cactus SPs UUID to string format
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Change-Id: I32dbf40e4c5aa959bb92d3e853072aea63409ddc
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