| 0957b9b2 | 30-Apr-2019 |
Christoph Müllner <christophm30@gmail.com> |
rockchip: Streamline and complete UARTn_BASE macros.
In order to set the UART base during bootup in common code of
plat/rockchip, we need to streamline the way the UART base addresses
are defined an
rockchip: Streamline and complete UARTn_BASE macros.
In order to set the UART base during bootup in common code of
plat/rockchip, we need to streamline the way the UART base addresses
are defined and add the missing definitions and mappings.
This patch does so by following the pattern UARTn_BASE, which is
already in use on RK3399 and RK3328. The numbering itself is derived
from the upstream Linux DTS files of the individual SoCs.
Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I341a1996f4ceed5f82a2f6687d4dead9d7cc5c1f
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| 37b6b8d3 | 18-Apr-2019 |
Julius Werner <jwerner@chromium.org> |
docs: Update contribution guidelines for binary components
This patch updates the contribution guidelines to refer to the new
binary repository.
Change-Id: I898dc58973be91c3f87be53a755269fca2e93174
docs: Update contribution guidelines for binary components
This patch updates the contribution guidelines to refer to the new
binary repository.
Change-Id: I898dc58973be91c3f87be53a755269fca2e93174
Signed-off-by: Julius Werner <jwerner@chromium.org>
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| 9a25f982 | 30-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "ti: k3: common: Remove MSMC port definitions" into integration |
| 29162843 | 30-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "lm/stack_protector" into integration
* changes:
juno: Add security sources for tsp-juno
Add support for default stack-protector flag |
| 2a3c645b | 17-Apr-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
juno: Add security sources for tsp-juno
Security sources are required if stack-protector is enabled.
Change-Id: Ia0071f60cf03d48b200fd1facbe50bd9e2f8f282
Signed-off-by: Louis Mayencourt <louis.maye
juno: Add security sources for tsp-juno
Security sources are required if stack-protector is enabled.
Change-Id: Ia0071f60cf03d48b200fd1facbe50bd9e2f8f282
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| fd7b287c | 26-Mar-2019 |
Louis Mayencourt <louis.mayencourt@arm.com> |
Add support for default stack-protector flag
The current stack-protector support is for none, "strong" or "all".
The default use of the flag enables the stack-protection to all
functions that declar
Add support for default stack-protector flag
The current stack-protector support is for none, "strong" or "all".
The default use of the flag enables the stack-protection to all
functions that declare a character array of eight bytes or more in
length on their stack.
This option can be tuned with the --param=ssp-buffer-size=N option.
Change-Id: I11ad9568187d58de1b962b8ae04edd1dc8578fb0
Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
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| a82bf5ad | 27-Mar-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove MSMC port definitions
The MSMC port defines were added to help in the case when some ports
are not connected and have no cores attached. We can get the same
functionality by d
ti: k3: common: Remove MSMC port definitions
The MSMC port defines were added to help in the case when some ports
are not connected and have no cores attached. We can get the same
functionality by defined the number of cores on that port to zero.
This simplifies several code paths, do this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I3247fe37af7b86c3227e647b4f617fab70c8ee8a
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| 19b4f689 | 29-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "rockchip: only include libfdt in non-coreboot cases" into integration |
| 7a446cab | 29-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "hikey: Add define for UART2" into integration |
| f15e7adb | 29-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "avenger96" into integration
* changes:
fdts: Fix DTC warnings for STM32MP1 platform
docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable
stm32mp1: Add A
Merge changes from topic "avenger96" into integration
* changes:
fdts: Fix DTC warnings for STM32MP1 platform
docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable
stm32mp1: Add Avenger96 board support
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| 591e2b3d | 29-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "k3-coherency" into integration
* changes:
ti: k3: common: Mark sections for AM65x coherency workaround
ti: k3: common: Allow USE_COHERENT_MEM for K3
ti: k3: common: F
Merge changes from topic "k3-coherency" into integration
* changes:
ti: k3: common: Mark sections for AM65x coherency workaround
ti: k3: common: Allow USE_COHERENT_MEM for K3
ti: k3: common: Fix RO data area size calculation
ti: k3: common: Remove unused STUB macro
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| d697f9b8 | 29-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge "plat: allwinner: common: use r_wdog instead of wdog" into integration |
| a3d9172d | 29-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge changes Ie7766e80,Ia74dbc36 into integration
* changes:
plat: marvell: do not rely on argument passed via smc
plat: marvell: sip: make sure that comphy init will use correct address |
| 4200e5aa | 24-Apr-2019 |
Heiko Stuebner <heiko@sntech.de> |
rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt
rockchip: only include libfdt in non-coreboot cases
While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt is somewhat big, it makes sense to limit
its inclusion to where necessary and thus only to non-coreboot
builds.
libfdt itself will get build in all cases, but only the non-
coreboot build will actually reference and thus include it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7
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| ff180993 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Mark sections for AM65x coherency workaround
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is no
ti: k3: common: Mark sections for AM65x coherency workaround
These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is not either. Mark it off to keep it separated from the rest of
the PSCI implementation.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef
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| ebfb0709 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Allow USE_COHERENT_MEM for K3
To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.
Signed-off-by: An
ti: k3: common: Allow USE_COHERENT_MEM for K3
To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I1c05477a97646ac73846a711bc38d3746628d847
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| 64752374 | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Fix RO data area size calculation
The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.
ti: k3: common: Fix RO data area size calculation
The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.
Note, this was noticed at a glance thanks to the new aligned formating
of this table.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I994022ac9fc95dc5e37a420714da76081c61cce7
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| 282514cf | 25-Apr-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Remove unused STUB macro
This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Cha
ti: k3: common: Remove unused STUB macro
This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ida33f92fe3810a89e6e51faf6e93c1d2ada1a2ee
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| 84086055 | 23-Apr-2019 |
Michalis Pappas <mpappas@fastmail.fm> |
hikey: Add define for UART2
Change-Id: I54869151bfc434df66933bd418c70cca9c3d0861
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm> |
| 45875d91 | 26-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
fdts: Fix DTC warnings for STM32MP1 platform
DTC issues below warnings for STM32MP1 platform for using upper case
in unit address:
fdts/stm32mp15-ddr.dtsi:8.20-151.5: Warning (simple_bus_reg): /soc
fdts: Fix DTC warnings for STM32MP1 platform
DTC issues below warnings for STM32MP1 platform for using upper case
in unit address:
fdts/stm32mp15-ddr.dtsi:8.20-151.5: Warning (simple_bus_reg): /soc/ddr@5A003000: simple-bus unit address format error, expected "5a003000"
fdts/stm32mp157c-security.dtsi:9.25-13.5: Warning (simple_bus_reg): /soc/stgen@5C008000: simple-bus unit address format error, expected "5c008000"
Fix this by using the lower case unit address for concerned nodes.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change-Id: Id3d19ac3b47ec6bcea2bd3382225e2e923dc4a70
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| f657fa99 | 26-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable
Since STM32MP1 platform supports different boards, it is necessary
to build for a particular board. With the current instructions,
docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable
Since STM32MP1 platform supports different boards, it is necessary
to build for a particular board. With the current instructions, the
user has to modify the DTB_FILE_NAME variable in platform.mk for
building for a particular board, but this can be avoided by passing
the appropriate board DTB name via DTB_FILE_NAME make variable.
Hence document the same in platform doc.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change-Id: I16797e7256c7eb699a7b8846356fe430d0fe0aa1
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| cdf3d1a9 | 26-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
stm32mp1: Add Avenger96 board support
Add board support for Avenger96 board from Arrow Electronics. This
board is based on STM32MP157A SoC and is one of the 96Boards Consumer
Edition platform.
More
stm32mp1: Add Avenger96 board support
Add board support for Avenger96 board from Arrow Electronics. This
board is based on STM32MP157A SoC and is one of the 96Boards Consumer
Edition platform.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change-Id: Ic905f26c38d03883c6e4ea221b4b275a4b534857
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| 51675206 | 26-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "rk3399: m0: Fix compiler warnings." into integration |
| f80a60ce | 26-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge "Cortex-A53: Fix reporting of missing errata when not needed" into integration |
| 8742f857 | 26-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "rk3288" into integration
* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double
Merge changes from topic "rk3288" into integration
* changes:
rockchip: document platform
rockchip: add support for rk3288
rockchip: add common aarch32 support
rockchip: rk3328: drop double declaration of entry_point storage
rockchip: Allow socs with undefined wfe check bits
rockchip: move pmusram assembler code to a aarch64 subdir
sp_min: allow inclusion of a platform-specific linker script
sp_min: make sp_min_warm_entrypoint public
drivers: ti: uart: add a aarch32 variant
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