plat/arm: Reduce size of BL31 binary

BL31 binary size is aligned to 4KB because of the
code in include\plat\arm\common\arm_reclaim_init.ld.S:
__INIT_CODE_UNALIGNED__ = .;
. = ALIGN(PAGE_SIZE

plat/arm: Reduce size of BL31 binary

BL31 binary size is aligned to 4KB because of the
code in include\plat\arm\common\arm_reclaim_init.ld.S:
__INIT_CODE_UNALIGNED__ = .;
. = ALIGN(PAGE_SIZE);
__INIT_CODE_END__ = .;
with all the zero data after the last instruction of
BL31 code to the end of the page.
This causes increase in size of BL31 binary stored in FIP
and its loading time by BL2.
This patch reduces the size of BL31 image by moving
page alignment from __INIT_CODE_END__ to __STACKS_END__
which also increases the stack size for secondary CPUs.

Change-Id: Ie2ec503fc774c22c12ec506d74fd3ef2b0b183a9
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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sc7180 platform support

Adding support for QTI CHIP SC7180 on ATF

Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
Co-authored-by: Mauli

sc7180 platform support

Adding support for QTI CHIP SC7180 on ATF

Change-Id: I0d82d3a378036003fbd0bc4784f61464bb76ea82
Signed-off-by: Saurabh Gorecha <sgorecha@codeaurora.org>
Co-authored-by: Maulik Shah <mkshah@codeaurora.org>

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Tegra: memctrl: remove unused TZRAM setup function

This patch removes the unused TZRAM setup function from the memory
controller driver.

Change-Id: Ic16f21fb84c47df71be6ab3e1e286640daa39291
Signed-

Tegra: memctrl: remove unused TZRAM setup function

This patch removes the unused TZRAM setup function from the memory
controller driver.

Change-Id: Ic16f21fb84c47df71be6ab3e1e286640daa39291
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: reorganize drivers and lib folders

This patch moves the 'drivers' and the 'lib' folders out of the
'common' folder. This way the 'common' folder shall contain only
the platform support requir

Tegra: reorganize drivers and lib folders

This patch moves the 'drivers' and the 'lib' folders out of the
'common' folder. This way the 'common' folder shall contain only
the platform support required for all Tegra platforms.

Change-Id: I2f238572d0a078d60c6b458a559538dc8a4d1856
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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plat: imx: add sdei support for i.MX8MM

Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

S

plat: imx: add sdei support for i.MX8MM

Add sdei support for i.MX8MM, this is to let jailhouse Hypervisor
could use SDEI to do hypervisor management, after physical IRQ
has been disabled routing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: I5fd697fee22df151e13d0f1335e8ac8a7bae6189

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Merge "Initialize platform for MediaTek mt8192" into integration

Merge "BL31: Fix relocation error for PIE" into integration

Merge "Use abspath to dereference $BUILD_BASE" into integration

Use abspath to dereference $BUILD_BASE

If the user tries to change BUILD_BASE to put the build products outside
the build tree the compile will fail due to hard coded assumptions that
$BUILD_BASE is

Use abspath to dereference $BUILD_BASE

If the user tries to change BUILD_BASE to put the build products outside
the build tree the compile will fail due to hard coded assumptions that
$BUILD_BASE is a relative path. Fix by using $(abspath $(BUILD_BASE))
to rationalize to an absolute path every time and remove the relative
path assumptions.

This patch also adds documentation that BUILD_BASE can be specified by
the user.

Signed-off-by: Grant Likely <grant.likely@arm.com>
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ib1af874de658484aaffc672f30029b852d2489c8

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Merge "spm-mm: fix MISRA C-2012 Rule 2.3 spm_mm_boot_info_t defined but never used." into integration

Merge "SPM: build OP-TEE as an S-EL1 Secure Partition" into integration

Merge "arm_fpga: Support uploading a custom command line" into integration

BL31: Fix relocation error for PIE

This patch fixes BL31 linker error
"relocation R_AARCH64_ABS32 against `a local symbol'
can not be used when making a shared object"
when Position Independent Ex

BL31: Fix relocation error for PIE

This patch fixes BL31 linker error
"relocation R_AARCH64_ABS32 against `a local symbol'
can not be used when making a shared object"
when Position Independent Executable (PIE) support
is enabled with ENABLE_PIE=1 build option.

Change-Id: I2692269676db3f3b27eed499fc029fffb67969be
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

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tbbr/dualroot: rename SP package certificate file

Currently only single signing domain is supported for SP packages but
there is plan to support dual signing domains if CoT is dualroot.

SP_CONTENT_

tbbr/dualroot: rename SP package certificate file

Currently only single signing domain is supported for SP packages but
there is plan to support dual signing domains if CoT is dualroot.

SP_CONTENT_CERT_ID is the certificate file which is currently generated
and signed with trusted world key which in-turn is derived from Silicon
provider RoT key.
To allow dual signing domain for SP packages, other certificate file
will be derived from Platform owned RoT key.

This patch renames "SP_CONTENT_CERT_ID" to "SIP_SP_CONTENT_CERT_ID" and
does other related changes.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I0bc445a3ab257e2dac03faa64f46e36a9fed5e93

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spm-mm: fix MISRA C-2012 Rule 2.3 spm_mm_boot_info_t defined but never used.

Following merge of patchset [1] the spm_mm_boot_info_t structure is
included in few platform files unconditionally even w

spm-mm: fix MISRA C-2012 Rule 2.3 spm_mm_boot_info_t defined but never used.

Following merge of patchset [1] the spm_mm_boot_info_t structure is
included in few platform files unconditionally even when SPM_MM option
is disabled.

[1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/2647

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I68bc034c9348b5d9bcfd2e5217b781df5ad1b369

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Initialize platform for MediaTek mt8192

- Add basic platform setup
- Add mt8192 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address

Change-Id: Ife34622105404

Initialize platform for MediaTek mt8192

- Add basic platform setup
- Add mt8192 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address

Change-Id: Ife34622105404a8227441aab939e3c55c96374e9
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.com>

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Merge "fconf: spm: minor bug fix" into integration

arm_fpga: Support uploading a custom command line

The command line for BL33 payloads is typically taken from the DTB. On
"normal" systems the bootloader will put the right version in there, but
we t

arm_fpga: Support uploading a custom command line

The command line for BL33 payloads is typically taken from the DTB. On
"normal" systems the bootloader will put the right version in there, but
we typically don't use one on the FPGAs.
To avoid editing (and possibly re-packaging) the DTB for every change in
the command line, try to read it from some "magic" memory location
instead. It can be easily placed there by the tool that uploads the
other payloads to the FPGA's memory. BL31 will then replace the existing
command line in the DTB with that new string.

To avoid reading garbage, check the memory location for containing a
magic value. This is conveniently chosen to be a simple ASCII string, so
it can just preceed the actual command line in a text file:
--------------------------------
CMD:console=ttyAMA0,38400n8 debug loglevel=8
--------------------------------

Change-Id: I5923a80332c9fac3b4afd1a6aaa321233d0f60da
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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SPM: build OP-TEE as an S-EL1 Secure Partition

Provide manifest and build options to boot OP-TEE as a
guest S-EL1 Secure Partition on top of Hafnium in S-EL2.

Increase ARM_SP_MAX_SIZE to cope with

SPM: build OP-TEE as an S-EL1 Secure Partition

Provide manifest and build options to boot OP-TEE as a
guest S-EL1 Secure Partition on top of Hafnium in S-EL2.

Increase ARM_SP_MAX_SIZE to cope with OP-TEE debug build image.

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Idd2686fa689a78fe2d05ed92b1d23c65e2edd4cb

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plat: marvell: octeontx: add support for t9130

CN-9130 has single CP0 inside the package and 2 additional one from MoChi
interface. In case of db-9130-modular board the MCI interface is routed to:
-

plat: marvell: octeontx: add support for t9130

CN-9130 has single CP0 inside the package and 2 additional one from MoChi
interface. In case of db-9130-modular board the MCI interface is routed to:
- on-board CP115 (MCI0)
- extension board CP115 (MCI1)

The board is based on DIMM DDR.

The 9130 has up to 3CP, and decoding windows looks like below:

(free for further use)
.----------. 0xf800 0000
| CP2 CFG |
'----------' 0xf600 0000
| CP1 CFG |
'----------' 0xf400 0000
| CP0 CFG |
'----------' 0xf200 0000
| AP CFG |
'----------' 0xf000 0000
(free for further use)
.----------. 0xec00 0000
| SPI |
| MEM_MAP | (Currently not opened)
'----------' 0xe800 0000
| PEX2_CP2 |
'----------' 0xe700 0000
| PEX1_CP2 |
'----------' 0xe600 0000
| PEX0-CP2 |
'----------'
.----------. 0xe500 0000
| PEX2_CP1 |
'----------' 0xe400 0000
| PEX1_CP1 |
'----------' 0xe300 0000
| PEX0-CP1 |
'----------'
.----------. 0xe200 0000
| PEX2-CP0 |
'----------' 0xe100 0000
| PEX1-CP0 |
'----------' 0xe000 0000
| PEX0-CP0 |
| 512MB |
'----------' 0xc000 0000

Change-Id: Ia8eee4f96c1043753f74f9da437b9f72ce2d6eb0
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

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plat: marvell: t9130: add SVC support

As the preparation for adding the CN913x SoC family support
introduce code that enable SVC and the frequency handling
specific for the AP807 North Bridge.

Chan

plat: marvell: t9130: add SVC support

As the preparation for adding the CN913x SoC family support
introduce code that enable SVC and the frequency handling
specific for the AP807 North Bridge.

Change-Id: Ibe34a511b49cd9671a2e53b77bdcfc644bb915e3
Signed-off-by: Alex Evraev <alexev@marvell.com>

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plat: marvell: t9130: update AVS settings

Update AVS settings and remove unused macros.
This is a preparation patch for adding CN913x SoC
family support.

Change-Id: Ib1dd70885a316ed5763d0f4730d0e47

plat: marvell: t9130: update AVS settings

Update AVS settings and remove unused macros.
This is a preparation patch for adding CN913x SoC
family support.

Change-Id: Ib1dd70885a316ed5763d0f4730d0e4734da117b7
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

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plat: marvell: t9130: pass actual CP count for load_image

Add CN913x case to bl2_plat_get_cp_count.
Fix loading of cp1/2 image. This is a preparation
patch for adding CN913x SoC family support.

Cha

plat: marvell: t9130: pass actual CP count for load_image

Add CN913x case to bl2_plat_get_cp_count.
Fix loading of cp1/2 image. This is a preparation
patch for adding CN913x SoC family support.

Change-Id: Id84a30203d20572fc0dfd3f91ea395c199a85fe9
Signed-off-by: Ben Peled <bpeled@marvell.com>

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plat: marvell: armada: a7k: add support to SVC validation mode

Add support for “AVS reduction” feature at this mode for
7040 Dual Cluster operation mode at CPU=1600MHz

Change-Id: Ia72b10e0ccfad0756

plat: marvell: armada: a7k: add support to SVC validation mode

Add support for “AVS reduction” feature at this mode for
7040 Dual Cluster operation mode at CPU=1600MHz

Change-Id: Ia72b10e0ccfad07568bf4c089ea3990173ae24b2
Signed-off-by: Alex Evraev <alexev@marvell.com>

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plat: marvell: armada: add support for twin-die combined memory device

the twin-die combined memory device should be treated as
X8 device and not as X16 one. This patch is required to
re-enable comp

plat: marvell: armada: add support for twin-die combined memory device

the twin-die combined memory device should be treated as
X8 device and not as X16 one. This patch is required to
re-enable compilation after BLE (mv-ddr-marvell) firmware upgrade.

Change-Id: I41257ff2825164ebca85a84bbb8462d7b3447b97
Signed-off-by: Moti Buskila <motib@marvell.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

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