History log of /rk3399_ARM-atf/plat/ (Results 51 – 75 of 8950)
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3f3b9ec607-May-2025 Ahmed Azeem <ahmed.azeem@arm.com>

feat(rdaspen/ras): intr RAS handling for PC CPU

This introduces and enables the RAS framework and enables
the RAS for CPU handling.

This commit ensures that RAS settings are initialized on
all CPU

feat(rdaspen/ras): intr RAS handling for PC CPU

This introduces and enables the RAS framework and enables
the RAS for CPU handling.

This commit ensures that RAS settings are initialized on
all CPU cores during the firmware boot stage. Previously,
the initialization for RAS processing was only done on
the primary CPU core.

This also introduces a custom bl31_platform_setup to
allow RAS specific intialisations.

Change-Id: Ia3258aed63b8994c53ec8cc49bd27d0d907e218e
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>
Signed-off-by: Ahmed Tiba <ahmed.tiba@arm.com>

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6a548c3402-Aug-2022 Manoj Kumar <manoj.kumar3@arm.com>

feat(morello): add capability load/store/track support to MMU

Morello architecture adds additional bits to TCR_EL3 and uses the
HWU bits of page/block descriptors to provision permission for
loading

feat(morello): add capability load/store/track support to MMU

Morello architecture adds additional bits to TCR_EL3 and uses the
HWU bits of page/block descriptors to provision permission for
loading, storing and tracking of valid capability tags.

This patch reserves bit 31 of the existing translation table
attribute field which can be used by the user to enable capability
load/store/track permission for a given memory region.

This patch also enables this permission for BL31 region.

Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
Change-Id: I1939c70aac3585969d74b0956529681e840d6f63

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4a6b037d06-Jan-2026 Marek Vasut <marek.vasut+renesas@mailbox.org>

feat(rcar): fold console_rcar_* functions into rcar_printf.c

The three console_rcar_{init,putc,flush}() no-op functions can
easily be C functions, they do not need assembler wrappers. Move
the funct

feat(rcar): fold console_rcar_* functions into rcar_printf.c

The three console_rcar_{init,putc,flush}() no-op functions can
easily be C functions, they do not need assembler wrappers. Move
the functions into rcar_printf.c which is part of the custom
R-Car Gen3 memory logging console. Remove rcar_printf.c from
BL2 builds, as it is not useful there. Rename rcar_set_log_data()
to console_rcar_putc() and update its signature, it is no longer
necessary to have such a wrapper around C function.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ia7a1c37b2151f6217cde70ffd2b367643d3184e4

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656a856406-Jan-2026 Marek Vasut <marek.vasut+renesas@mailbox.org>

feat(rcar): rewrite SCIF driver from assembler to C

Rewrite the SCIF driver from difficult to read assembler to plain C.
Use scif-common.c which contains putc() and flush() helper functions
to avoid

feat(rcar): rewrite SCIF driver from assembler to C

Rewrite the SCIF driver from difficult to read assembler to plain C.
Use scif-common.c which contains putc() and flush() helper functions
to avoid duplication, so only fill in the initialization code. Drop
support for external clock, which is unused. Clean up macros and drop
ones which are not referenced.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: Ia933c505c33e133e45448c82776a17629f3df1eb

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574db8ec19-Dec-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(el3-runtime): remove lower_el_panic()

A panic at EL3 is bad news and should never happen. What caused it isn't
exactly relevant or possible to figure out without manual debugging
(surely there w

fix(el3-runtime): remove lower_el_panic()

A panic at EL3 is bad news and should never happen. What caused it isn't
exactly relevant or possible to figure out without manual debugging
(surely there wouldn't have been a panic if not). A misbehaving lower EL
should never be able to cause problems for a higher EL and since EL3 is
in control of all lower ELs a panic at EL3 means that there is a
problem with EL3.

This patch removes lower_el panic and replaces it with a simple panic
for simplicity. There is a slight loss of information when an AArch32
lower EL has one of its instructions trapped by EL3. An explicit error
message is added to preserve this information.

Change-Id: Iefd20eb43d69cbcf6d66ed5cc894c4e0255782e3
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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6de7520a20-Jul-2025 Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

fix(el3-runtime): resolve essential-type mismatch

This resolves MISRA C:2012 Rule 10.7 violation
where a composite expression involved operands of differing
essential types, causing unintended impli

fix(el3-runtime): resolve essential-type mismatch

This resolves MISRA C:2012 Rule 10.7 violation
where a composite expression involved operands of differing
essential types, causing unintended implicit conversions.

The fix ensures all operands in the expression have matching
essential types by introducing explicit casts,
preventing unsafe or inconsistent arithmetic operations.

Change-Id: If01dfe78e7a5cffc8b0efa6ac969b262e236852b
Signed-off-by: Taticharla Venkata Sai <venkatasai.taticharla@amd.com>

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3f637a4008-Jan-2026 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(st): allow the use of clang as linker" into integration

c72e81c508-Jan-2026 Mark Dykes <mark.dykes@arm.com>

Merge changes from topic "st_clang_linker" into integration

* changes:
refactor(st): simplify rule to build .stm32 file
fix(st): use KEEP for .dtb_image and .bl2_image sections

83efb77b07-Jan-2026 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(build): use ARM_ARCH_FEATURE instead of -march directly" into integration

460b5cfc04-Jan-2026 Marek Vasut <marek.vasut+renesas@mailbox.org>

fix(rcar3): prevent boot CPU hot unplug

The boot CPU runs both TFA and later also Trusted OS, which is UP and can
not be migrated to another CPU. Report MIGRATE_INFO_TYPE "Uniprocessor (UP)
not migr

fix(rcar3): prevent boot CPU hot unplug

The boot CPU runs both TFA and later also Trusted OS, which is UP and can
not be migrated to another CPU. Report MIGRATE_INFO_TYPE "Uniprocessor (UP)
not migrate capable 1" to the OS, so any attempts at CPU_OFF and MIGRATE
of the boot CPU would be DENIED. This has an effect also e.g. on the Linux
kernel, where it prevents stopping boot CPU (CPU0) using CPU hotplug, which
must not be allowed, as it would interfere with the Trusted OS.

Change-Id: I0f38e64711c13ae48e819fb33939451720749c68
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Signed-off-by: Dien Pham <dien.pham.ry@renesas.com>
Signed-off-by: Hieu Nguyen <hieu.nguyen.dn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

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e3c9003906-Jan-2026 Yann Gautier <yann.gautier@st.com>

Merge "feat(rcar3): rephrase RCAR_BL31_CRASH_BASE definition" into integration

308636c406-Jan-2026 Mark Dykes <mark.dykes@arm.com>

Merge "fix(rcar): enable intialisation code for EL3 to NS-EL1 handoff" into integration

c52ef2a006-Jan-2026 Govindraj Raja <govindraj.raja@arm.com>

Merge "feat(mt8196): add audio SMC cmd implementation" into integration

abf5915606-Nov-2025 Yann Gautier <yann.gautier@st.com>

feat(st): allow the use of clang as linker

Use same .map file structure for llvm-clang and llvm-lld.

Change-Id: I4a3dd76df29e4a38ed33c2bc2c8bbdf31b8d5281
Signed-off-by: Yann Gautier <yann.gautier@s

feat(st): allow the use of clang as linker

Use same .map file structure for llvm-clang and llvm-lld.

Change-Id: I4a3dd76df29e4a38ed33c2bc2c8bbdf31b8d5281
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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56c4d22607-Nov-2025 Yann Gautier <yann.gautier@st.com>

refactor(st): simplify rule to build .stm32 file

Instead of using substitution for STM32_TF_ELF_LDFLAGS, directly use
ld_prefix helper.
Use TF_LDFLAGS to avoid adding -nostartfiles and -no-pie optio

refactor(st): simplify rule to build .stm32 file

Instead of using substitution for STM32_TF_ELF_LDFLAGS, directly use
ld_prefix helper.
Use TF_LDFLAGS to avoid adding -nostartfiles and -no-pie options.
Add -static to STM32_TF_ELF_LDFLAGS options, and --build-id=none is
already handled with TF_LDFLAGS.

Change-Id: I6d64b524d98701007aabf150b5c8229799e663d3
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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8329be5a06-Jan-2026 Olivier Deprez <olivier.deprez@arm.com>

Merge "fix(intel): restore overlap-safe memcpy_s to prevent SoCFPGA BL2 hang" into integration

9cbde74707-Nov-2025 Yann Gautier <yann.gautier@st.com>

fix(st): use KEEP for .dtb_image and .bl2_image sections

Use KEEP keyword in linker scripts that are used to build .stm32 files.
This avoids them being removed if --gc-sections option is used.

Chan

fix(st): use KEEP for .dtb_image and .bl2_image sections

Use KEEP keyword in linker scripts that are used to build .stm32 files.
This avoids them being removed if --gc-sections option is used.

Change-Id: If8e98a293199184ef3cabc45da8de6cd505d9886
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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d2d6928608-Dec-2025 boogie <boogiepop@gmx.com>

feat(rk3588): report actual measured PVTPLL clocks

The GRF block includes a counter that measures PVTPLL clock pulses after
the CON1 register, exposed via STATUS1 and STATUS2. The counter uses an
in

feat(rk3588): report actual measured PVTPLL clocks

The GRF block includes a counter that measures PVTPLL clock pulses after
the CON1 register, exposed via STATUS1 and STATUS2. The counter uses an
input clock that can be configured in the CRU block; however, in the
current ATF implementation it is always XIN = 24 MHz.

The counter accumulates PVTPLL pulses for a window of:

measurement_time = CON1 / input_frequency

Since CON1 is fixed to 24, the current implementation measures over:

24 / 24 MHz = 1 µs

The resulting count is stored in the lower 14 bits of STATUS2.

This commit waits 2 µs (ensuring the 1 µs accumulation period completes)
and computes the PVTPLL frequency from the measured value. While CON1
could be increased for higher accuracy (as long as the 14-bit counter
does not overflow), this change keeps the existing 1 µs window for
simplicity.

With this feature, PVTPLL frequency can be measured with ~1 MHz
accuracy, instead of reporting only the configured frequency, which can
hide information related to chip degradation and environmental effects
impacting PVTPLL clocks.

Ideally the flow of measuring PVTPLL clocks should be the same for the
rest of RK35xx devices with minor tweaks at most.

Change-Id: Idc18246e8d794777f0dacc7820f15fcecc00af33
Signed-off-by: Hüseyin BIYIK <boogiepop@gmx.com>

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a2e7973406-Jan-2026 Olivier Deprez <olivier.deprez@arm.com>

Merge "fix(st): avoid enormous tf-a-stm32mp13*stm32" into integration

b66160f429-Dec-2025 Marek Vasut <marex@nabladev.com>

fix(st): avoid enormous tf-a-stm32mp13*stm32

The current STM32MP13xx build produces tf-a-stm32mp13*stm32 which is
about 800 MiB is size. This is caused by default build-id emitted by
GNU linker and

fix(st): avoid enormous tf-a-stm32mp13*stm32

The current STM32MP13xx build produces tf-a-stm32mp13*stm32 which is
about 800 MiB is size. This is caused by default build-id emitted by
GNU linker and no-pie build. Change the linker flags such that the
build is static and no build-id is generated. This produces expected
binary, with the right size, which works on the actual hardware again.
This fix is similar to 72f4b70e8e8e ("fix(rcar-layout): fix tool build").

This failure is triggered using most of arm-linux-* toolchains, which
are generated by OE-core 5.0 Scarthgap, arm-linux-gnueabi* 15.2.0 in
Debian and such toolchain. The arm-none-eabi- toolchains do not seem
to trigger this.

Change-Id: I0f7d9f330dbe08d6adf491ed79b3a10a4adfecc7
Fixes: 6d26d75c374b ("fix(st): set no-pie option when building ST elf file")
Signed-off-by: Marek Vasut <marex@nabladev.com>

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e6a8b32205-Jan-2026 Manish Pandey <manish.pandey2@arm.com>

Merge changes I20c97011,Ia1facabb into integration

* changes:
fix(rk3576): shorten names to fit into the allocated space
fix(debugfs): allocate enough space to fit all names

fb0c409805-Nov-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(build): use ARM_ARCH_FEATURE instead of -march directly

The -march compiler flag is owned by make_helpers/march.mk and its
output is controlled by ARM_ARCH_MAJOR, ARM_ARCH_MINOR, and
ARM_ARCH_FE

fix(build): use ARM_ARCH_FEATURE instead of -march directly

The -march compiler flag is owned by make_helpers/march.mk and its
output is controlled by ARM_ARCH_MAJOR, ARM_ARCH_MINOR, and
ARM_ARCH_FEATURE. Setting -march directly can lead to unexpected results
when using the above flags and is generally not recommended within tfa.

This patch migrates all instances of -march=armv8-a+crc to
ARM_ARCH_FEATURE=crc. Arm platforms (via arm_common.mk) are checked and
those that support cores greater than arm8.1 do not get the flag as it
is automatically pulled in.

Change-Id: I846f97367eab9529524a2805d5b87d34cce2360f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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ecf9c23108-Nov-2022 Vincent Bryce <vincent.bryce@cogentembedded.com>

feat(rcar3): rephrase RCAR_BL31_CRASH_BASE definition

Since RCAR_BL31_CRASH_BASE depends on the RCAR_TRUSTED_SRAM_BASE,
use it for the RCAR_BL31_CRASH_BASE calculation.

Change-Id: Ibf3b4747a8dbd8fb

feat(rcar3): rephrase RCAR_BL31_CRASH_BASE definition

Since RCAR_BL31_CRASH_BASE depends on the RCAR_TRUSTED_SRAM_BASE,
use it for the RCAR_BL31_CRASH_BASE calculation.

Change-Id: Ibf3b4747a8dbd8fbbff793387d841e615788a003
Signed-off-by: Vincent Bryce <vincent.bryce@cogentembedded.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

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9397357c27-Sep-2024 Hieu Nguyen <hieu.nguyen.dn@renesas.com>

fix(rcar): enable intialisation code for EL3 to NS-EL1 handoff

Enable initialisation code for handoff from EL3 to NS-EL1 using the
INIT_UNUSED_NS_EL2 flag on both R-Car Gen3 and Gen4 SoCs. This is
u

fix(rcar): enable intialisation code for EL3 to NS-EL1 handoff

Enable initialisation code for handoff from EL3 to NS-EL1 using the
INIT_UNUSED_NS_EL2 flag on both R-Car Gen3 and Gen4 SoCs. This is
used by cores which proceed directly from EL3 to NS-ES1 and have no
code in NS-EL2.

Change-Id: I4d2441e23a0020fe98298c7f329514686ca62fe4
Signed-off-by: Hieu Nguyen <hieu.nguyen.dn@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
---
Marek: update commit message, combined for Gen3 and Gen4

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6866675a24-Dec-2025 Cyril Chao <cyril.chao@mediatek.corp-partner.google.com>

feat(mt8196): add audio SMC cmd implementation

To enable audio SMMU, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS setting
is required to allow audio to use its own DAPC IP domain. If not
set, audio access to D

feat(mt8196): add audio SMC cmd implementation

To enable audio SMMU, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS setting
is required to allow audio to use its own DAPC IP domain. If not
set, audio access to DRAM will be blocked.
- Add MT8196 specific code
- Enable for MT8196

Signed-off-by: Cyril Chao <Cyril.Chao@mediatek.com>
Change-Id: I0dfc35d8a7116bcd69d6ca643a5ce527bb32676e

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