fix(qemu): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS ( for fixed/real platforms)
2:

fix(qemu): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS ( for fixed/real platforms)
2: FEAT_STATE_CHECK ( for configurable platforms)
to meet the feature detection requirements dynamically, mainly
targetting configurable/Fixed Virtual platforms.

With this mechanism in place, we are refactoring all the existing
feature flags to the FEAT_STATE_CHECK option(=2), including
FEAT_SVE explicitly for FVPs.

SVE Patch Reference:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19888/25

This newly introduced change, breaks the existing behaviour especially
for virtual platforms, who have set the ENABLE_SVE_FOR_NS flag to 1.

Moving ahead, we advise the platforms to take the following steps while
enabling the features:

1. If the platform is configurable (virtual), and want to ensure feature
detection happens dynamically at runtime, set the build flags to
FEAT_STATE_CHECK(=2).

2. For real(fixed) platforms, depending on the features supported by the
hardware and platform wants to enable it, platforms could set build
flags to FEAT_STATE_ALWAYS(=1).

(Note: Only the non-secure world enablement related build flags have
been refactored to take the values within 0 to 2. As earlier Secure
world enablement flags will still remain boolean.)

Henceforth, in order to keep it aligned with this tri-state mechanism,
changing the qemu platform default to the now supported dynamic
option(=2), so the right decision can be made by the code at runtime.

Change-Id: Icc95b8b872378b7874d4345b631adfc314e4dada
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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fix(tc): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS (for fixed/real platforms)
2: FEA

fix(tc): enable dynamic feature detection of FEAT_SVE for NormalWorld

Currently, TF-A supports three states for feature flags:
0: FEAT_DISABLED
1: FEAT_STATE_ALWAYS (for fixed/real platforms)
2: FEAT_STATE_CHECK (for configurable platforms)
to meet the feature detection requirements dynamically, mainly
targetting configurable/Fixed Virtual platforms.

With this mechanism in place, we are refactoring all the existing
feature flags to the FEAT_STATE_CHECK option(=2), including
FEAT_SVE explicitly for FVPs.

SVE Patch Reference:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19888/25

This newly introduced change, breaks the existing behaviour especially
for virtual platforms, who have set the ENABLE_SVE_FOR_NS flag to 1.

Moving ahead, we advise the platforms to take the following steps while
enabling the features:

1. If the platform is configurable (virtual), and want to ensure feature
detection happens dynamically at runtime, set the build flags to
FEAT_STATE_CHECK(=2).

2. For real(fixed) platforms, depending on the features supported by the
hardware and platform wants to enable it, platforms could set build
flags to FEAT_STATE_ALWAYS(=1).

(Note: Only the non-secure world enablement related build flags have
been refactored to take the values within 0 to 2. As earlier Secure
world enablement flags will still remain boolean.)

Henceforth, in order to keep it aligned with this tri-state mechanism,
changing the TC platform default to the now supported dynamic
option(=2), so the right decision can be made by the code at runtime.

Change-Id: I4c1ebeb55a00a7f148fac1573a6694b7c02a0a81
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): mov

Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): move mbedtls config files
refactor(st): add common mk files

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feat(ti): synchronize access to secure proxy threads

When communicating with the system controller over secure proxy we clear
a thread, write our message, then wait for a response. This must not be

feat(ti): synchronize access to secure proxy threads

When communicating with the system controller over secure proxy we clear
a thread, write our message, then wait for a response. This must not be
interrupted by a different transfer on the same thread. Take a lock
during this sequence to prevent contention.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I7789f017fde7180ab6b4ac07458464b967c8e580

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refactor(ti): remove inline directive from ti_sci and sec_proxy drivers

Let the compiler choose when to inline. Here this reduces binary size.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I6

refactor(ti): remove inline directive from ti_sci and sec_proxy drivers

Let the compiler choose when to inline. Here this reduces binary size.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: I68cd0fc3a94c8c94781ca3dc277a1dd4c6f2bd3a

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refactor(ti): refactor ti_sci_{setup,do}_xfer to allow zero size response

This allows us to use the common xfer setup path even for no-wait
messages. Then factor that out of each no-wait function.

refactor(ti): refactor ti_sci_{setup,do}_xfer to allow zero size response

This allows us to use the common xfer setup path even for no-wait
messages. Then factor that out of each no-wait function.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: Ib17d3facd293f3fc91dda56b2906121b43250261

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feat(ti): add sub and patch version number support

Although we do not use these for anything today, they are returned
in this structure and the struct's definition should match.

While here fix a co

feat(ti): add sub and patch version number support

Although we do not use these for anything today, they are returned
in this structure and the struct's definition should match.

While here fix a couple comment typos.

Signed-off-by: Andrew Davis <afd@ti.com>
Change-Id: Iac4ec999b44e703e600bde93b0eee83753566876

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Merge "feat(mediatek): add APU init flow" into integration

Merge changes from topic "jc/cpu_feat" into integration

* changes:
feat(cpufeat): enable FEAT_SVE for FEAT_STATE_CHECKED
feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

feat(mediatek): add APU init flow

The patch brings preparation steps before powering on APU
(AI processing unit)

Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89
Signed-off-by: Chungying Lu <ch

feat(mediatek): add APU init flow

The patch brings preparation steps before powering on APU
(AI processing unit)

Change-Id: Ica01e035153ec6f3af0de6ba2c66b17a064f8c89
Signed-off-by: Chungying Lu <chungying.lu@mediatek.com>

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Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary condition
feat(versal): replace irq array with switch case
feat(versal-net): add support for set wakeup source
refactor(versal): move set wake src fn to common place

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feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting
feat_sme_supported() into an ID register reading function and a
second fun

feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED

Add support for runtime detection (ENABLE_SME_FOR_NS=2), by splitting
feat_sme_supported() into an ID register reading function and a
second function to report the support status. That function considers
both build time settings and runtime information (if needed), and is
used before we do SME specific setup.

Change the FVP platform default to the now supported dynamic option
(=2),so the right decision can be made by the code at runtime.

Change-Id: Ida9ccf737db5be20865b84f42b1f9587be0626ab
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>

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Merge "refactor(xilinx): rename gic macros to make common" into integration

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
feat(xilinx): add device node indexes
fix(xilinx): initialize values to device enum members

Merge "refactor(xilinx): move pm_defs.h to common place" into integration

Merge "refactor(xilinx): move versal files to common place" into integration

Merge changes from topic "psci-osi" into integration

* changes:
feat(sc7280): add support for PSCI_OS_INIT_MODE
feat(fvp): enable support for PSCI OS-initiated mode
feat(psci): update PSCI_FEA

Merge changes from topic "psci-osi" into integration

* changes:
feat(sc7280): add support for PSCI_OS_INIT_MODE
feat(fvp): enable support for PSCI OS-initiated mode
feat(psci): update PSCI_FEATURES
feat(psci): add support for OS-initiated mode
feat(psci): add support for PSCI_SET_SUSPEND_MODE
build(psci): add build option for OS-initiated mode
docs(psci): add design proposal for OS-initiated mode

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Merge changes from topic "feat_amu_rework" into integration

* changes:
refactor(amu): use new AMU feature check routines
refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Cha

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6ad992da30f2def9f46c8ba79753d79ed00fe024

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fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce13

fix(xilinx): fix misra defects

This patch fixes defects 5.5, 10.1, 10.3, 10.4, 10.7 reported
by MISRA-2012 scan.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie6f6e9bf2ce1335bbb61aa2e69a3a196865fd504

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fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.b

fix(xilinx): remove unnecessary condition

Remove unnecessary condition check from pm_client_set_wakeup_sources()
as the code will never get to this condition.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ia046e1188fdf6e024a146d3f4dd3d8f87a285e7f

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feat(versal): replace irq array with switch case

Replaced array of interrupt to PM node index map with switch-case for
Versal. As a result, the size of code got reduced by 527 bytes. In case
of erro

feat(versal): replace irq array with switch case

Replaced array of interrupt to PM node index map with switch-case for
Versal. As a result, the size of code got reduced by 527 bytes. In case
of error return invalid node index i.e. XPM_NODEIDX_DEV_MIN.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ifb17366362e2d1757d8933e1ce29083f7ad86b8f

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feat(versal-net): add support for set wakeup source

Currently wakeup source is not getting setup during suspend resume.
Add support to set wakeup source as per IRQ enabled using switch-case
instead

feat(versal-net): add support for set wakeup source

Currently wakeup source is not getting setup during suspend resume.
Add support to set wakeup source as per IRQ enabled using switch-case
instead of static array as it is more efficient.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I30d7ceb3a1d56ba5174fc7334f3a29081c918c92

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refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatt

refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ib82c5f85a0a27bc47940f6796f1cf68b2c38a908

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refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLA

refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common
for both Versal and Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6

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