xref: /rk3399_ARM-atf/include/arch/aarch64/arch_features.h (revision 45007acd46981b9f289f03b283eb53e7ba37bb67)
1 /*
2  * Copyright (c) 2019-2023, Arm Limited. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef ARCH_FEATURES_H
8 #define ARCH_FEATURES_H
9 
10 #include <stdbool.h>
11 
12 #include <arch_helpers.h>
13 #include <common/feat_detect.h>
14 
15 #define ISOLATE_FIELD(reg, feat)					\
16 	((unsigned int)(((reg) >> (feat ## _SHIFT)) & (feat ## _MASK)))
17 
18 static inline bool is_armv7_gentimer_present(void)
19 {
20 	/* The Generic Timer is always present in an ARMv8-A implementation */
21 	return true;
22 }
23 
24 static inline unsigned int read_feat_pan_id_field(void)
25 {
26 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_PAN);
27 }
28 
29 static inline bool is_feat_pan_supported(void)
30 {
31 	if (ENABLE_FEAT_PAN == FEAT_STATE_DISABLED) {
32 		return false;
33 	}
34 
35 	if (ENABLE_FEAT_PAN == FEAT_STATE_ALWAYS) {
36 		return true;
37 	}
38 
39 	return read_feat_pan_id_field() != 0U;
40 }
41 
42 static inline unsigned int read_feat_vhe_id_field(void)
43 {
44 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_VHE);
45 }
46 
47 static inline bool is_feat_vhe_supported(void)
48 {
49 	if (ENABLE_FEAT_VHE == FEAT_STATE_DISABLED) {
50 		return false;
51 	}
52 
53 	if (ENABLE_FEAT_VHE == FEAT_STATE_ALWAYS) {
54 		return true;
55 	}
56 
57 	return read_feat_vhe_id_field() != 0U;
58 }
59 
60 static inline bool is_armv8_2_ttcnp_present(void)
61 {
62 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_CNP_SHIFT) &
63 		ID_AA64MMFR2_EL1_CNP_MASK) != 0U;
64 }
65 
66 static inline bool is_feat_pacqarma3_present(void)
67 {
68 	uint64_t mask_id_aa64isar2 =
69 			(ID_AA64ISAR2_GPA3_MASK << ID_AA64ISAR2_GPA3_SHIFT) |
70 			(ID_AA64ISAR2_APA3_MASK << ID_AA64ISAR2_APA3_SHIFT);
71 
72 	/* If any of the fields is not zero, QARMA3 algorithm is present */
73 	return (read_id_aa64isar2_el1() & mask_id_aa64isar2) != 0U;
74 }
75 
76 static inline bool is_armv8_3_pauth_present(void)
77 {
78 	uint64_t mask_id_aa64isar1 =
79 		(ID_AA64ISAR1_GPI_MASK << ID_AA64ISAR1_GPI_SHIFT) |
80 		(ID_AA64ISAR1_GPA_MASK << ID_AA64ISAR1_GPA_SHIFT) |
81 		(ID_AA64ISAR1_API_MASK << ID_AA64ISAR1_API_SHIFT) |
82 		(ID_AA64ISAR1_APA_MASK << ID_AA64ISAR1_APA_SHIFT);
83 
84 	/*
85 	 * If any of the fields is not zero or QARMA3 is present,
86 	 * PAuth is present
87 	 */
88 	return ((read_id_aa64isar1_el1() & mask_id_aa64isar1) != 0U ||
89 		is_feat_pacqarma3_present());
90 }
91 
92 static inline bool is_armv8_4_dit_present(void)
93 {
94 	return ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
95 		ID_AA64PFR0_DIT_MASK) == 1U;
96 }
97 
98 static inline bool is_armv8_4_ttst_present(void)
99 {
100 	return ((read_id_aa64mmfr2_el1() >> ID_AA64MMFR2_EL1_ST_SHIFT) &
101 		ID_AA64MMFR2_EL1_ST_MASK) == 1U;
102 }
103 
104 static inline bool is_armv8_5_bti_present(void)
105 {
106 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_BT_SHIFT) &
107 		ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
108 }
109 
110 static inline unsigned int get_armv8_5_mte_support(void)
111 {
112 	return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
113 		ID_AA64PFR1_EL1_MTE_MASK);
114 }
115 
116 static inline unsigned int read_feat_sel2_id_field(void)
117 {
118 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_SEL2);
119 }
120 
121 static inline bool is_feat_sel2_supported(void)
122 {
123 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_DISABLED) {
124 		return false;
125 	}
126 
127 	if (ENABLE_FEAT_SEL2 == FEAT_STATE_ALWAYS) {
128 		return true;
129 	}
130 
131 	return read_feat_sel2_id_field() != 0U;
132 }
133 
134 static inline unsigned int read_feat_twed_id_field(void)
135 {
136 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_TWED);
137 }
138 
139 static inline bool is_feat_twed_supported(void)
140 {
141 	if (ENABLE_FEAT_TWED == FEAT_STATE_DISABLED) {
142 		return false;
143 	}
144 
145 	if (ENABLE_FEAT_TWED == FEAT_STATE_ALWAYS) {
146 		return true;
147 	}
148 
149 	return read_feat_twed_id_field() != 0U;
150 }
151 
152 static unsigned int read_feat_fgt_id_field(void)
153 {
154 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_FGT);
155 }
156 
157 static inline bool is_feat_fgt_supported(void)
158 {
159 	if (ENABLE_FEAT_FGT == FEAT_STATE_DISABLED) {
160 		return false;
161 	}
162 
163 	if (ENABLE_FEAT_FGT == FEAT_STATE_ALWAYS) {
164 		return true;
165 	}
166 
167 	return read_feat_fgt_id_field() != 0U;
168 }
169 
170 static unsigned int read_feat_ecv_id_field(void)
171 {
172 	return ISOLATE_FIELD(read_id_aa64mmfr0_el1(), ID_AA64MMFR0_EL1_ECV);
173 }
174 
175 static inline bool is_feat_ecv_supported(void)
176 {
177 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
178 		return false;
179 	}
180 
181 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
182 		return true;
183 	}
184 
185 	return read_feat_ecv_id_field() != 0U;
186 }
187 
188 static inline bool is_feat_ecv_v2_supported(void)
189 {
190 	if (ENABLE_FEAT_ECV == FEAT_STATE_DISABLED) {
191 		return false;
192 	}
193 
194 	if (ENABLE_FEAT_ECV == FEAT_STATE_ALWAYS) {
195 		return true;
196 	}
197 
198 	return read_feat_ecv_id_field() >= ID_AA64MMFR0_EL1_ECV_SELF_SYNCH;
199 }
200 
201 static unsigned int read_feat_rng_id_field(void)
202 {
203 	return ISOLATE_FIELD(read_id_aa64isar0_el1(), ID_AA64ISAR0_RNDR);
204 }
205 
206 static inline bool is_feat_rng_supported(void)
207 {
208 	if (ENABLE_FEAT_RNG == FEAT_STATE_DISABLED) {
209 		return false;
210 	}
211 
212 	if (ENABLE_FEAT_RNG == FEAT_STATE_ALWAYS) {
213 		return true;
214 	}
215 
216 	return read_feat_rng_id_field() != 0U;
217 }
218 
219 static unsigned int read_feat_tcrx_id_field(void)
220 {
221 	return ISOLATE_FIELD(read_id_aa64mmfr3_el1(), ID_AA64MMFR3_EL1_TCRX);
222 }
223 
224 static inline bool is_feat_tcr2_supported(void)
225 {
226 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_DISABLED) {
227 		return false;
228 	}
229 
230 	if (ENABLE_FEAT_TCR2 == FEAT_STATE_ALWAYS) {
231 		return true;
232 	}
233 
234 	return read_feat_tcrx_id_field() != 0U;
235 }
236 
237 /*******************************************************************************
238  * Functions to identify the presence of the Activity Monitors Extension
239  ******************************************************************************/
240 static unsigned int read_feat_amu_id_field(void)
241 {
242 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_AMU);
243 }
244 
245 static inline bool is_feat_amu_supported(void)
246 {
247 	if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) {
248 		return false;
249 	}
250 
251 	if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) {
252 		return true;
253 	}
254 
255 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1;
256 }
257 
258 static inline bool is_feat_amuv1p1_supported(void)
259 {
260 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_DISABLED) {
261 		return false;
262 	}
263 
264 	if (ENABLE_FEAT_AMUv1p1 == FEAT_STATE_ALWAYS) {
265 		return true;
266 	}
267 
268 	return read_feat_amu_id_field() >= ID_AA64PFR0_AMU_V1P1;
269 }
270 
271 /*
272  * Return MPAM version:
273  *
274  * 0x00: None Armv8.0 or later
275  * 0x01: v0.1 Armv8.4 or later
276  * 0x10: v1.0 Armv8.2 or later
277  * 0x11: v1.1 Armv8.4 or later
278  *
279  */
280 static inline unsigned int read_feat_mpam_version(void)
281 {
282 	return (unsigned int)((((read_id_aa64pfr0_el1() >>
283 		ID_AA64PFR0_MPAM_SHIFT) & ID_AA64PFR0_MPAM_MASK) << 4) |
284 				((read_id_aa64pfr1_el1() >>
285 		ID_AA64PFR1_MPAM_FRAC_SHIFT) & ID_AA64PFR1_MPAM_FRAC_MASK));
286 }
287 
288 static inline bool is_feat_mpam_supported(void)
289 {
290 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_DISABLED) {
291 		return false;
292 	}
293 
294 	if (ENABLE_MPAM_FOR_LOWER_ELS == FEAT_STATE_ALWAYS) {
295 		return true;
296 	}
297 
298 	return read_feat_mpam_version() != 0U;
299 }
300 
301 static inline unsigned int read_feat_hcx_id_field(void)
302 {
303 	return ISOLATE_FIELD(read_id_aa64mmfr1_el1(), ID_AA64MMFR1_EL1_HCX);
304 }
305 
306 static inline bool is_feat_hcx_supported(void)
307 {
308 	if (ENABLE_FEAT_HCX == FEAT_STATE_DISABLED) {
309 		return false;
310 	}
311 
312 	if (ENABLE_FEAT_HCX == FEAT_STATE_ALWAYS) {
313 		return true;
314 	}
315 
316 	return read_feat_hcx_id_field() != 0U;
317 }
318 
319 static inline bool is_feat_rng_trap_present(void)
320 {
321 	return (((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_RNDR_TRAP_SHIFT) &
322 			ID_AA64PFR1_EL1_RNDR_TRAP_MASK)
323 			== ID_AA64PFR1_EL1_RNG_TRAP_SUPPORTED);
324 }
325 
326 static inline unsigned int get_armv9_2_feat_rme_support(void)
327 {
328 	/*
329 	 * Return the RME version, zero if not supported.  This function can be
330 	 * used as both an integer value for the RME version or compared to zero
331 	 * to detect RME presence.
332 	 */
333 	return (unsigned int)(read_id_aa64pfr0_el1() >>
334 		ID_AA64PFR0_FEAT_RME_SHIFT) & ID_AA64PFR0_FEAT_RME_MASK;
335 }
336 
337 /*********************************************************************************
338  * Function to identify the presence of FEAT_SB (Speculation Barrier Instruction)
339  ********************************************************************************/
340 static inline unsigned int read_feat_sb_id_field(void)
341 {
342 	return ISOLATE_FIELD(read_id_aa64isar1_el1(), ID_AA64ISAR1_SB);
343 }
344 
345 /*********************************************************************************
346  * Function to identify the presence of FEAT_CSV2_2 (Cache Speculation Variant 2)
347  ********************************************************************************/
348 static inline unsigned int read_feat_csv2_id_field(void)
349 {
350 	return ISOLATE_FIELD(read_id_aa64pfr0_el1(), ID_AA64PFR0_CSV2);
351 }
352 
353 static inline bool is_feat_csv2_2_supported(void)
354 {
355 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_DISABLED) {
356 		return false;
357 	}
358 
359 	if (ENABLE_FEAT_CSV2_2 == FEAT_STATE_ALWAYS) {
360 		return true;
361 	}
362 
363 	return read_feat_csv2_id_field() >= ID_AA64PFR0_CSV2_2_SUPPORTED;
364 }
365 
366 /**********************************************************************************
367  * Function to identify the presence of FEAT_SPE (Statistical Profiling Extension)
368  *********************************************************************************/
369 static inline unsigned int read_feat_spe_id_field(void)
370 {
371 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_PMS);
372 }
373 
374 static inline bool is_feat_spe_supported(void)
375 {
376 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_DISABLED) {
377 		return false;
378 	}
379 
380 	if (ENABLE_SPE_FOR_NS == FEAT_STATE_ALWAYS) {
381 		return true;
382 	}
383 
384 	return read_feat_spe_id_field() != 0U;
385 }
386 
387 /*******************************************************************************
388  * Function to identify the presence of FEAT_SVE (Scalable Vector Extension)
389  ******************************************************************************/
390 static inline bool is_armv8_2_feat_sve_present(void)
391 {
392 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_SVE_SHIFT) &
393 		ID_AA64PFR0_SVE_MASK) == ID_AA64PFR0_SVE_SUPPORTED);
394 }
395 
396 /*******************************************************************************
397  * Function to identify the presence of FEAT_RAS (Reliability,Availability,
398  * and Serviceability Extension)
399  ******************************************************************************/
400 static inline bool is_armv8_2_feat_ras_present(void)
401 {
402 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_RAS_SHIFT) &
403 		ID_AA64PFR0_RAS_MASK) != ID_AA64PFR0_RAS_NOT_SUPPORTED);
404 }
405 
406 /**************************************************************************
407  * Function to identify the presence of FEAT_DIT (Data Independent Timing)
408  *************************************************************************/
409 static inline bool is_armv8_4_feat_dit_present(void)
410 {
411 	return (((read_id_aa64pfr0_el1() >> ID_AA64PFR0_DIT_SHIFT) &
412 		ID_AA64PFR0_DIT_MASK) == ID_AA64PFR0_DIT_SUPPORTED);
413 }
414 
415 static inline unsigned int read_feat_tracever_id_field(void)
416 {
417 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEVER);
418 }
419 
420 static inline bool is_feat_sys_reg_trace_supported(void)
421 {
422 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_DISABLED) {
423 		return false;
424 	}
425 
426 	if (ENABLE_SYS_REG_TRACE_FOR_NS == FEAT_STATE_ALWAYS) {
427 		return true;
428 	}
429 
430 	return read_feat_tracever_id_field() != 0U;
431 }
432 
433 /*************************************************************************
434  * Function to identify the presence of FEAT_TRF (TraceLift)
435  ************************************************************************/
436 static inline unsigned int read_feat_trf_id_field(void)
437 {
438 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEFILT);
439 }
440 
441 static inline bool is_feat_trf_supported(void)
442 {
443 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_DISABLED) {
444 		return false;
445 	}
446 
447 	if (ENABLE_TRF_FOR_NS == FEAT_STATE_ALWAYS) {
448 		return true;
449 	}
450 
451 	return read_feat_trf_id_field() != 0U;
452 }
453 
454 /********************************************************************************
455  * Function to identify the presence of FEAT_NV2 (Enhanced Nested Virtualization
456  * Support)
457  *******************************************************************************/
458 static inline unsigned int read_feat_nv_id_field(void)
459 {
460 	return ISOLATE_FIELD(read_id_aa64mmfr2_el1(), ID_AA64MMFR2_EL1_NV);
461 }
462 
463 static inline bool is_feat_nv2_supported(void)
464 {
465 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_DISABLED) {
466 		return false;
467 	}
468 
469 	if (CTX_INCLUDE_NEVE_REGS == FEAT_STATE_ALWAYS) {
470 		return true;
471 	}
472 
473 	return read_feat_nv_id_field() >= ID_AA64MMFR2_EL1_NV2_SUPPORTED;
474 }
475 
476 /*******************************************************************************
477  * Function to identify the presence of FEAT_BRBE (Branch Record Buffer
478  * Extension)
479  ******************************************************************************/
480 static inline unsigned int read_feat_brbe_id_field(void)
481 {
482 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_BRBE);
483 }
484 
485 static inline bool is_feat_brbe_supported(void)
486 {
487 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_DISABLED) {
488 		return false;
489 	}
490 
491 	if (ENABLE_BRBE_FOR_NS == FEAT_STATE_ALWAYS) {
492 		return true;
493 	}
494 
495 	return read_feat_brbe_id_field() != 0U;
496 }
497 
498 /*******************************************************************************
499  * Function to identify the presence of FEAT_TRBE (Trace Buffer Extension)
500  ******************************************************************************/
501 static inline unsigned int read_feat_trbe_id_field(void)
502 {
503 	return ISOLATE_FIELD(read_id_aa64dfr0_el1(), ID_AA64DFR0_TRACEBUFFER);
504 }
505 
506 static inline bool is_feat_trbe_supported(void)
507 {
508 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_DISABLED) {
509 		return false;
510 	}
511 
512 	if (ENABLE_TRBE_FOR_NS == FEAT_STATE_ALWAYS) {
513 		return true;
514 	}
515 
516 	return read_feat_trbe_id_field() != 0U;
517 
518 }
519 /*******************************************************************************
520  * Function to identify the presence of FEAT_SMEx (Scalar Matrix Extension)
521  ******************************************************************************/
522 static inline unsigned int read_feat_sme_fa64_id_field(void)
523 {
524 	return ISOLATE_FIELD(read_id_aa64smfr0_el1(), ID_AA64SMFR0_EL1_SME_FA64);
525 }
526 
527 static inline unsigned int read_feat_sme_id_field(void)
528 {
529 	return ISOLATE_FIELD(read_id_aa64pfr1_el1(), ID_AA64PFR1_EL1_SME);
530 }
531 
532 static inline bool is_feat_sme_supported(void)
533 {
534 	if (ENABLE_SME_FOR_NS == FEAT_STATE_DISABLED) {
535 		return false;
536 	}
537 
538 	if (ENABLE_SME_FOR_NS == FEAT_STATE_ALWAYS) {
539 		return true;
540 	}
541 
542 	return read_feat_sme_id_field() >= ID_AA64PFR1_EL1_SME_SUPPORTED;
543 }
544 
545 #endif /* ARCH_FEATURES_H */
546