1 /* 2 * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * APU specific definition of processors in the subsystem as well as functions 10 * for getting information about and changing state of the APU. 11 */ 12 13 #include <assert.h> 14 #include <plat_ipi.h> 15 #include <platform_def.h> 16 #include <versal_def.h> 17 #include <lib/bakery_lock.h> 18 #include <lib/mmio.h> 19 #include <lib/utils.h> 20 #include <drivers/arm/gicv3.h> 21 #include <drivers/arm/gic_common.h> 22 #include <plat/common/platform.h> 23 #include "pm_api_sys.h" 24 #include "pm_client.h" 25 #include "pm_defs.h" 26 27 #define UNDEFINED_CPUID (~0) 28 29 DEFINE_BAKERY_LOCK(pm_client_secure_lock); 30 31 static const struct pm_ipi apu_ipi = { 32 .local_ipi_id = IPI_ID_APU, 33 .remote_ipi_id = IPI_ID_PMC, 34 .buffer_base = IPI_BUFFER_APU_BASE, 35 }; 36 37 /* Order in pm_procs_all array must match cpu ids */ 38 static const struct pm_proc pm_procs_all[] = { 39 { 40 .node_id = XPM_DEVID_ACPU_0, 41 .ipi = &apu_ipi, 42 .pwrdn_mask = APU_0_PWRCTL_CPUPWRDWNREQ_MASK, 43 }, 44 { 45 .node_id = XPM_DEVID_ACPU_1, 46 .ipi = &apu_ipi, 47 .pwrdn_mask = APU_1_PWRCTL_CPUPWRDWNREQ_MASK, 48 } 49 }; 50 51 const struct pm_proc *primary_proc = &pm_procs_all[0]; 52 53 /* Interrupt to PM node index map */ 54 static enum pm_device_node_idx irq_node_map[IRQ_MAX + 1] = { 55 [13] = XPM_NODEIDX_DEV_GPIO, 56 [14] = XPM_NODEIDX_DEV_I2C_0, 57 [15] = XPM_NODEIDX_DEV_I2C_1, 58 [16] = XPM_NODEIDX_DEV_SPI_0, 59 [17] = XPM_NODEIDX_DEV_SPI_1, 60 [18] = XPM_NODEIDX_DEV_UART_0, 61 [19] = XPM_NODEIDX_DEV_UART_1, 62 [20] = XPM_NODEIDX_DEV_CAN_FD_0, 63 [21] = XPM_NODEIDX_DEV_CAN_FD_1, 64 [22] = XPM_NODEIDX_DEV_USB_0, 65 [23] = XPM_NODEIDX_DEV_USB_0, 66 [24] = XPM_NODEIDX_DEV_USB_0, 67 [25] = XPM_NODEIDX_DEV_USB_0, 68 [26] = XPM_NODEIDX_DEV_USB_0, 69 [37] = XPM_NODEIDX_DEV_TTC_0, 70 [38] = XPM_NODEIDX_DEV_TTC_0, 71 [39] = XPM_NODEIDX_DEV_TTC_0, 72 [40] = XPM_NODEIDX_DEV_TTC_1, 73 [41] = XPM_NODEIDX_DEV_TTC_1, 74 [42] = XPM_NODEIDX_DEV_TTC_1, 75 [43] = XPM_NODEIDX_DEV_TTC_2, 76 [44] = XPM_NODEIDX_DEV_TTC_2, 77 [45] = XPM_NODEIDX_DEV_TTC_2, 78 [46] = XPM_NODEIDX_DEV_TTC_3, 79 [47] = XPM_NODEIDX_DEV_TTC_3, 80 [48] = XPM_NODEIDX_DEV_TTC_3, 81 [56] = XPM_NODEIDX_DEV_GEM_0, 82 [57] = XPM_NODEIDX_DEV_GEM_0, 83 [58] = XPM_NODEIDX_DEV_GEM_1, 84 [59] = XPM_NODEIDX_DEV_GEM_1, 85 [60] = XPM_NODEIDX_DEV_ADMA_0, 86 [61] = XPM_NODEIDX_DEV_ADMA_1, 87 [62] = XPM_NODEIDX_DEV_ADMA_2, 88 [63] = XPM_NODEIDX_DEV_ADMA_3, 89 [64] = XPM_NODEIDX_DEV_ADMA_4, 90 [65] = XPM_NODEIDX_DEV_ADMA_5, 91 [66] = XPM_NODEIDX_DEV_ADMA_6, 92 [67] = XPM_NODEIDX_DEV_ADMA_7, 93 [74] = XPM_NODEIDX_DEV_USB_0, 94 [126] = XPM_NODEIDX_DEV_SDIO_0, 95 [127] = XPM_NODEIDX_DEV_SDIO_0, 96 [128] = XPM_NODEIDX_DEV_SDIO_1, 97 [129] = XPM_NODEIDX_DEV_SDIO_1, 98 [142] = XPM_NODEIDX_DEV_RTC, 99 }; 100 101 /** 102 * irq_to_pm_node_idx - Get PM node index corresponding to the interrupt number 103 * @irq: Interrupt number 104 * 105 * Return: PM node index corresponding to the specified interrupt 106 */ 107 enum pm_device_node_idx irq_to_pm_node_idx(uint32_t irq) 108 { 109 assert(irq <= IRQ_MAX); 110 return irq_node_map[irq]; 111 } 112 113 /** 114 * pm_client_suspend() - Client-specific suspend actions 115 * 116 * This function should contain any PU-specific actions 117 * required prior to sending suspend request to PMU 118 * Actions taken depend on the state system is suspending to. 119 */ 120 void pm_client_suspend(const struct pm_proc *proc, uint32_t state) 121 { 122 bakery_lock_get(&pm_client_secure_lock); 123 124 if (state == PM_STATE_SUSPEND_TO_RAM) { 125 pm_client_set_wakeup_sources((uint32_t)proc->node_id); 126 } 127 128 /* Set powerdown request */ 129 mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) | 130 (uint32_t)proc->pwrdn_mask); 131 132 bakery_lock_release(&pm_client_secure_lock); 133 } 134 135 /** 136 * pm_client_abort_suspend() - Client-specific abort-suspend actions 137 * 138 * This function should contain any PU-specific actions 139 * required for aborting a prior suspend request 140 */ 141 void pm_client_abort_suspend(void) 142 { 143 /* Enable interrupts at processor level (for current cpu) */ 144 gicv3_cpuif_enable(plat_my_core_pos()); 145 146 bakery_lock_get(&pm_client_secure_lock); 147 148 /* Clear powerdown request */ 149 mmio_write_32(FPD_APU_PWRCTL, mmio_read_32(FPD_APU_PWRCTL) & 150 ~((uint32_t)primary_proc->pwrdn_mask)); 151 152 bakery_lock_release(&pm_client_secure_lock); 153 } 154 155 /** 156 * pm_get_cpuid() - get the local cpu ID for a global node ID 157 * @nid: node id of the processor 158 * 159 * Return: the cpu ID (starting from 0) for the subsystem 160 */ 161 static uint32_t pm_get_cpuid(uint32_t nid) 162 { 163 for (size_t i = 0U; i < ARRAY_SIZE(pm_procs_all); i++) { 164 if (pm_procs_all[i].node_id == nid) { 165 return i; 166 } 167 } 168 return UNDEFINED_CPUID; 169 } 170 171 /** 172 * pm_client_wakeup() - Client-specific wakeup actions 173 * 174 * This function should contain any PU-specific actions 175 * required for waking up another APU core 176 */ 177 void pm_client_wakeup(const struct pm_proc *proc) 178 { 179 uint32_t cpuid = pm_get_cpuid(proc->node_id); 180 181 if (cpuid == UNDEFINED_CPUID) { 182 return; 183 } 184 185 bakery_lock_get(&pm_client_secure_lock); 186 187 /* clear powerdown bit for affected cpu */ 188 uint32_t val = mmio_read_32(FPD_APU_PWRCTL); 189 val &= ~(proc->pwrdn_mask); 190 mmio_write_32(FPD_APU_PWRCTL, val); 191 192 bakery_lock_release(&pm_client_secure_lock); 193 } 194 195 /** 196 * pm_get_proc() - returns pointer to the proc structure 197 * @cpuid: id of the cpu whose proc struct pointer should be returned 198 * 199 * Return: pointer to a proc structure if proc is found, otherwise NULL 200 */ 201 const struct pm_proc *pm_get_proc(uint32_t cpuid) 202 { 203 if (cpuid < ARRAY_SIZE(pm_procs_all)) { 204 return &pm_procs_all[cpuid]; 205 } 206 207 return NULL; 208 } 209