History log of /rk3399_ARM-atf/plat/ (Results 126 – 150 of 8868)
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8287d10117-Oct-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(imx): check if the cluster id is valid" into integration

579254a817-Oct-2025 Yann Gautier <yann.gautier@st.com>

Merge changes I82beb663,Ie970984e,Ia13f8e09,Ib498832d into integration

* changes:
feat(rcar): deduplicate plat_crash_print_regs
feat(rcar): split common SCIF code
feat(rcar): replace static rc

Merge changes I82beb663,Ie970984e,Ia13f8e09,Ib498832d into integration

* changes:
feat(rcar): deduplicate plat_crash_print_regs
feat(rcar): split common SCIF code
feat(rcar): replace static rcar_putc pointer with static register offsets
feat(rcar): deduplicate SCIF console_rcar_register

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0d35f9e517-Oct-2025 Yann Gautier <yann.gautier@st.com>

fix(st): add build directory for stm32image

Since patch to prevent build races on the build directory [1], there
could be issues to build stm32image tool, with parallel build, and when
using a custo

fix(st): add build directory for stm32image

Since patch to prevent build races on the build directory [1], there
could be issues to build stm32image tool, with parallel build, and when
using a custom BUILD_PLAT directory. Fix that the same way the other
tools were fixed (with: | $$(@D)/).

[1]: 774fb3798e43 fix(build): prevent races on the build directory

Change-Id: Idd3a43d2565018ea8755df69e7385f07fda7941f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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4e1ccc6029-Sep-2024 Shengfei Xu <xsf@rock-chips.com>

feat(rk3568): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Change-Id: Ide3a8dac72512ce79331592c3cbb86577de7df70
Signed-off-by: Shengf

feat(rk3568): support SCMI for clock/reset domain

rockchip scmi clock controls clocks which only available in secure mode.

Change-Id: Ide3a8dac72512ce79331592c3cbb86577de7df70
Signed-off-by: Shengfei Xu <xsf@rock-chips.com>

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203575c317-Oct-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes Ifbc5ab02,Ib9002609,I0276257d into integration

* changes:
fix(fvp): initialise the event log's size to avoid using gibberish values
fix(tsp): keep the tsp D128 unaware, not the dis

Merge changes Ifbc5ab02,Ib9002609,I0276257d into integration

* changes:
fix(fvp): initialise the event log's size to avoid using gibberish values
fix(tsp): keep the tsp D128 unaware, not the dispatcher
fix(dice): prevent compiler warnings

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b8ad1a1616-Oct-2025 Mark Dykes <mark.dykes@arm.com>

Merge "feat(rcar): deduplicate PWRC timer" into integration

53808e9c16-Oct-2025 Mark Dykes <mark.dykes@arm.com>

Merge changes I24209ac0,I1caf6cc6 into integration

* changes:
feat(rcar): deduplicate PWRC SRAM trampoline
feat(rcar): deduplicate stack protector

b3bcfd1214-Aug-2025 Andre Przywara <andre.przywara@arm.com>

feat(cpufeat): enable FEAT_PFAR support

Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system register

feat(cpufeat): enable FEAT_PFAR support

Implement support for FEAT_PFAR, which introduces the PFAR_ELx system
register, recording the faulting physical address for some aborts.
Those system registers are trapped by the SCR_EL3.PFARen bit, so set the
bit for the non-secure world context to allow OSes to use the feature.

This is controlled by the ENABLE_FEAT_PFAR build flag, which follows the
usual semantics of 2 meaning the feature being runtime detected.
Let the default for this flag be 0, but set it to 2 for the FVP.

Change-Id: I5c9ae750417e75792f693732df3869e02b6e4319
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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eaceb37313-Oct-2025 Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

fix(xilinx): limit pm_feature_check deprecation warning to once per boot

The deprecation warning in pm_feature_check() is being displayed
multiple times during boot, causing log spam.

Modify the wa

fix(xilinx): limit pm_feature_check deprecation warning to once per boot

The deprecation warning in pm_feature_check() is being displayed
multiple times during boot, causing log spam.

Modify the warning to display only once per boot session by using
a static boolean flag. This maintains the deprecation notification
while reducing log verbosity.

Change-Id: Ie2ae265b0e0b4d08c6341f1870258b970f5a1fc7
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

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aa05796e15-Oct-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "feat(cpufeat): enable FEAT_AIE support" into integration

b199ca1a13-Oct-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(fvp): initialise the event log's size to avoid using gibberish values

The event log's DT bindings only specify the lower 32 bits of the event
log's size, but the size is held in a 64 bit variabl

fix(fvp): initialise the event log's size to avoid using gibberish values

The event log's DT bindings only specify the lower 32 bits of the event
log's size, but the size is held in a 64 bit variable on stack. When
conditions are right, the uninitialised upper 32 bits may contain
gibberish that throws off our computations, leading to faults.

Change-Id: Ifbc5ab027aac4e8899fea962656b07960b9b00b9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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0c3b84c108-Oct-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(dice): prevent compiler warnings

LTO builds make the compiler observe possible unitialised accesses.
That's not the case, but calm it down with a 0. It also doesn't like the
declaration mismatch

fix(dice): prevent compiler warnings

LTO builds make the compiler observe possible unitialised accesses.
That's not the case, but calm it down with a 0. It also doesn't like the
declaration mismatch in tc so bring it in line.

Change-Id: I0276257d05d1cb1d4f7e1e0d914c48c8ab3d308d
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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8deba2a815-Oct-2025 Yann Gautier <yann.gautier@st.com>

Merge changes I17523700,Ic05f3227,Id9c509a5 into integration

* changes:
feat(qemu): add support for FEAT_GCS
feat(qemu): add support for FEAT_SxPxE
feat(qemu): add support for FEAT_TCR2 and FE

Merge changes I17523700,Ic05f3227,Id9c509a5 into integration

* changes:
feat(qemu): add support for FEAT_GCS
feat(qemu): add support for FEAT_SxPxE
feat(qemu): add support for FEAT_TCR2 and FEAT_SCTLR2

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3abe14f715-Oct-2025 Manish Pandey <manish.pandey2@arm.com>

Merge changes I92c3e293,I95149f5e into integration

* changes:
fix(imx): match function parameters to declaration
fix(intel): match declaration with definition

cab3162915-Oct-2025 Manish Pandey <manish.pandey2@arm.com>

Merge "fix(rcar3): clear TCR_EL1 at the BL2 entry point" into integration

d9872d7514-Oct-2025 Jean-Philippe Brucker <jean-philippe@linaro.org>

feat(qemu): add support for FEAT_GCS

Auto-detect FEAT_GCS and enable it when the platform supports it.
This is needed for Linux under QEMU 10.2

Change-Id: I175237006d3808bc058499a34357918674a0c561

feat(qemu): add support for FEAT_GCS

Auto-detect FEAT_GCS and enable it when the platform supports it.
This is needed for Linux under QEMU 10.2

Change-Id: I175237006d3808bc058499a34357918674a0c561
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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139ddfb514-Oct-2025 Jean-Philippe Brucker <jean-philippe@linaro.org>

feat(qemu): add support for FEAT_SxPxE

Auto-detect the POE and PIE features and enable them when the platform
supports them. This is needed for Linux under QEMU 10.2.

Change-Id: Ic05f3227e61386b06a

feat(qemu): add support for FEAT_SxPxE

Auto-detect the POE and PIE features and enable them when the platform
supports them. This is needed for Linux under QEMU 10.2.

Change-Id: Ic05f3227e61386b06a1deffce8678048aed456b1
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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436cc70214-Jul-2025 Pierrick Bouvier <pierrick.bouvier@linaro.org>

feat(qemu): add support for FEAT_TCR2 and FEAT_SCTLR2

QEMU supports this since 10.1.
ENABLE_FEAT_TCR2 is needed to boot a Linux guest.
ENABLE_FEAT_SCTLR2 is needed to boot a Linux nested guest.

Cha

feat(qemu): add support for FEAT_TCR2 and FEAT_SCTLR2

QEMU supports this since 10.1.
ENABLE_FEAT_TCR2 is needed to boot a Linux guest.
ENABLE_FEAT_SCTLR2 is needed to boot a Linux nested guest.

Change-Id: Id9c509a530fb5d0df9955f80ef26992d5bea1191
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>

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06f8eb5727-Sep-2025 Marek Vasut <marek.vasut+renesas@mailbox.org>

feat(rcar): deduplicate plat_crash_print_regs

The plat_crash_print_regs code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code. Split
plat_crash_print_regs in

feat(rcar): deduplicate plat_crash_print_regs

The plat_crash_print_regs code is functionally identical between
Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code. Split
plat_crash_print_regs into plat_macros_cci.S and move the Gen3
specific plat_print_gic_regs macro into plat_macros_gic.S so it
can be pulled in only on R-Car Gen3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Change-Id: I82beb663e769e7b33a79b992da9f70db7bad2d51

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82987cbd08-Oct-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(imx): match function parameters to declaration

The gic helpers always take core_pos as an argument.

Change-Id: I92c3e293c03ae788e6eaa0d251c9867d53c3139f
Signed-off-by: Boyan Karatotev <boyan.ka

fix(imx): match function parameters to declaration

The gic helpers always take core_pos as an argument.

Change-Id: I92c3e293c03ae788e6eaa0d251c9867d53c3139f
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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c90c0bed08-Oct-2025 Boyan Karatotev <boyan.karatotev@arm.com>

fix(intel): match declaration with definition

Patch 2fcb37db8 changed the alignment to 8, but the `extern` definition
remained at 32 so bring in line. Also use the same macro for the size of
the arr

fix(intel): match declaration with definition

Patch 2fcb37db8 changed the alignment to 8, but the `extern` definition
remained at 32 so bring in line. Also use the same macro for the size of
the array.

Change-Id: I95149f5e3428a58c464e616c385250b10eda2834
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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5c164a9f14-Oct-2025 Bipin Ravi <bipin.ravi@arm.com>

Merge changes from topic "gr/cpu_lib" into integration

* changes:
feat(cpus): add support for caddo cpu
feat(cpus): add support for veymont cpu

7e8b709614-Oct-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
fe

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
feat(build): allow full LTO builds with clang
refactor(build): make sorting of sections generic
feat(build): use clang as a linker
fix(build): correctly detect that an option is missing with ld_option
feat(build): pass cflags to the linker when LTO is enabled

show more ...

bded41d914-Oct-2025 Manish V Badarkhe <manish.badarkhe@arm.com>

Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration

* changes:
fix(build): prevent races on the build directory
refactor(build): make it standard to request a custom linker sc

Merge changes I769ac07f,Ia52ad5ed,I5d22ff86,Iea14d49c into integration

* changes:
fix(build): prevent races on the build directory
refactor(build): make it standard to request a custom linker script
perf(bl32): don't call cm_get_context() unnecessarily
refactor(bl1): simplify context getting and setting

show more ...

ad1f628814-Oct-2025 Yann Gautier <yann.gautier@st.com>

Merge changes from topic "imx8m-rdc" into integration

* changes:
refactor(imx8m): simplify RDC console config
fix(imx8m): add RDC entries for all missing UARTs

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