1# 2# Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9ifeq (${ARCH},aarch32) 10 ifeq (${AARCH32_SP},none) 11 $(error Variable AARCH32_SP has to be set for AArch32) 12 endif 13endif 14 15ifeq (${ARCH}, aarch64) 16 # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted 17 # DRAM (if available) or the TZC secured area of DRAM. 18 # TZC secured DRAM is the default. 19 20 ARM_TSP_RAM_LOCATION ?= dram 21 22 ifeq (${ARM_TSP_RAM_LOCATION}, tsram) 23 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 24 else ifeq (${ARM_TSP_RAM_LOCATION}, tdram) 25 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_DRAM_ID 26 else ifeq (${ARM_TSP_RAM_LOCATION}, dram) 27 ARM_TSP_RAM_LOCATION_ID = ARM_DRAM_ID 28 else 29 $(error Unsupported ARM_TSP_RAM_LOCATION value) 30 endif 31 32 # Process flags 33 # Process ARM_BL31_IN_DRAM flag 34 ARM_BL31_IN_DRAM := 0 35 $(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 36 $(eval $(call add_define,ARM_BL31_IN_DRAM)) 37else 38 ARM_TSP_RAM_LOCATION_ID = ARM_TRUSTED_SRAM_ID 39endif 40 41$(eval $(call add_define,ARM_TSP_RAM_LOCATION_ID)) 42 43 44# For the original power-state parameter format, the State-ID can be encoded 45# according to the recommended encoding or zero. This flag determines which 46# State-ID encoding to be parsed. 47ARM_RECOM_STATE_ID_ENC := 0 48 49# If the PSCI_EXTENDED_STATE_ID is set, then ARM_RECOM_STATE_ID_ENC need to 50# be set. Else throw a build error. 51ifeq (${PSCI_EXTENDED_STATE_ID}, 1) 52 ifeq (${ARM_RECOM_STATE_ID_ENC}, 0) 53 $(error Build option ARM_RECOM_STATE_ID_ENC needs to be set if \ 54 PSCI_EXTENDED_STATE_ID is set for ARM platforms) 55 endif 56endif 57 58# Process ARM_RECOM_STATE_ID_ENC flag 59$(eval $(call assert_boolean,ARM_RECOM_STATE_ID_ENC)) 60$(eval $(call add_define,ARM_RECOM_STATE_ID_ENC)) 61 62# Process ARM_DISABLE_TRUSTED_WDOG flag 63# By default, Trusted Watchdog is always enabled unless 64# SPIN_ON_BL1_EXIT or ENABLE_RME is set 65ARM_DISABLE_TRUSTED_WDOG := 0 66ifneq ($(filter 1,${SPIN_ON_BL1_EXIT} ${ENABLE_RME}),) 67ARM_DISABLE_TRUSTED_WDOG := 1 68endif 69$(eval $(call assert_boolean,ARM_DISABLE_TRUSTED_WDOG)) 70$(eval $(call add_define,ARM_DISABLE_TRUSTED_WDOG)) 71 72# Process ARM_CONFIG_CNTACR 73ARM_CONFIG_CNTACR := 1 74$(eval $(call assert_boolean,ARM_CONFIG_CNTACR)) 75$(eval $(call add_define,ARM_CONFIG_CNTACR)) 76 77# Process ARM_BL31_IN_DRAM flag 78ARM_BL31_IN_DRAM := 0 79$(eval $(call assert_boolean,ARM_BL31_IN_DRAM)) 80$(eval $(call add_define,ARM_BL31_IN_DRAM)) 81 82# Macro to enable ACS SMC handler 83PLAT_ARM_ACS_SMC_HANDLER := 0 84ifeq (${ENABLE_ACS_SMC}, 1) 85PLAT_ARM_ACS_SMC_HANDLER := 1 86endif 87 88# Build macro necessary for branching to ACS tests 89$(eval $(call add_define,PLAT_ARM_ACS_SMC_HANDLER)) 90 91# As per CCA security model, all root firmware must execute from on-chip secure 92# memory. This means we must not run BL31 from TZC-protected DRAM. 93ifeq (${ARM_BL31_IN_DRAM},1) 94 ifeq (${ENABLE_RME},1) 95 $(error BL31 must not run from DRAM on RME-systems. Please set ARM_BL31_IN_DRAM to 0) 96 endif 97endif 98 99# Process ARM_PLAT_MT flag 100ARM_PLAT_MT := 0 101$(eval $(call assert_boolean,ARM_PLAT_MT)) 102$(eval $(call add_define,ARM_PLAT_MT)) 103 104# Use translation tables library v2 by default 105ARM_XLAT_TABLES_LIB_V1 := 0 106$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 107$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 108 109# Don't have the Linux kernel as a BL33 image by default 110ARM_LINUX_KERNEL_AS_BL33 := 0 111$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 112$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 113 114ifeq (${ARM_LINUX_KERNEL_AS_BL33},1) 115 USE_KERNEL_DT_CONVENTION := 1 116 117 ifneq (${ARCH},aarch64) 118 ifneq (${RESET_TO_SP_MIN},1) 119 $(error ARM_LINUX_KERNEL_AS_BL33 is only available if RESET_TO_SP_MIN=1.) 120 endif 121 endif 122 ifndef HW_CONFIG_BASE 123 ifndef ARM_PRELOADED_DTB_BASE 124 $(error If ARM_LINUX_KERNEL_AS_BL33 is used, either HW_CONFIG_BASE or \ 125 ARM_PRELOADED_DTB_BASE must be set. ) 126 endif 127 128 HW_CONFIG_BASE := ${ARM_PRELOADED_DTB_BASE} 129 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 130 endif 131endif 132 133# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 134# in the FIP if the platform requires. 135ifneq ($(BL32_EXTRA1),) 136ifneq (${DECRYPTION_SUPPORT},none) 137$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1,,$(ENCRYPT_BL32))) 138else 139$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 140endif 141endif 142ifneq ($(BL32_EXTRA2),) 143ifneq (${DECRYPTION_SUPPORT},none) 144$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2,,$(ENCRYPT_BL32))) 145else 146$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 147endif 148endif 149 150# Enable PSCI_STAT_COUNT/RESIDENCY APIs on ARM platforms 151ENABLE_PSCI_STAT := 1 152ENABLE_PMF := 1 153 154# Override the standard libc with optimised libc_asm 155OVERRIDE_LIBC := 1 156ifeq (${OVERRIDE_LIBC},1) 157 include lib/libc/libc_asm.mk 158endif 159 160# On ARM platforms, separate the code and read-only data sections to allow 161# mapping the former as executable and the latter as execute-never. 162SEPARATE_CODE_AND_RODATA := 1 163 164# On ARM platforms, disable SEPARATE_NOBITS_REGION by default. Both PROGBITS 165# and NOBITS sections of BL31 image are adjacent to each other and loaded 166# into Trusted SRAM. 167SEPARATE_NOBITS_REGION := 0 168 169# In order to support SEPARATE_NOBITS_REGION for Arm platforms, we need to load 170# BL31 PROGBITS into secure DRAM space and BL31 NOBITS into SRAM. Hence mandate 171# the build to require that ARM_BL31_IN_DRAM is enabled as well. 172ifeq ($(SEPARATE_NOBITS_REGION),1) 173 ifneq ($(ARM_BL31_IN_DRAM),1) 174 $(error For SEPARATE_NOBITS_REGION, ARM_BL31_IN_DRAM must be enabled) 175 endif 176 ifneq ($(RECLAIM_INIT_CODE),0) 177 $(error For SEPARATE_NOBITS_REGION, RECLAIM_INIT_CODE cannot be supported) 178 endif 179endif 180 181# Enable PIE support for RESET_TO_BL31/RESET_TO_SP_MIN case 182ifneq ($(filter 1,${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 183 ENABLE_PIE := 1 184endif 185 186# On Arm platform, disable ARM_FW_CONFIG_LOAD_ENABLE by default. 187ARM_FW_CONFIG_LOAD_ENABLE := 0 188$(eval $(call assert_boolean,ARM_FW_CONFIG_LOAD_ENABLE)) 189$(eval $(call add_define,ARM_FW_CONFIG_LOAD_ENABLE)) 190 191# In order to enable ARM_FW_CONFIG_LOAD_ENABLE for the Arm platform, the 192# platform should be reset to BL2 (RESET_TO_BL2=1), and FW_CONFIG must be 193# specified. 194ifeq (${ARM_FW_CONFIG_LOAD_ENABLE},1) 195 ifneq (${RESET_TO_BL2},1) 196 $(error RESET_TO_BL2 must be enabled when ARM_FW_CONFIG_LOAD_ENABLE \ 197 is enabled) 198 endif 199 ifeq (${FW_CONFIG},) 200 $(error FW_CONFIG must be specified when ARM_FW_CONFIG_LOAD_ENABLE \ 201 is enabled) 202 endif 203endif 204 205# Disable GPT parser support, use FIP image by default 206ARM_GPT_SUPPORT := 0 207$(eval $(call assert_boolean,ARM_GPT_SUPPORT)) 208$(eval $(call add_define,ARM_GPT_SUPPORT)) 209 210# Include necessary sources to parse GPT image 211ifeq (${ARM_GPT_SUPPORT}, 1) 212 BL2_SOURCES += drivers/partition/gpt.c \ 213 drivers/partition/partition.c 214endif 215 216# Enable CRC instructions via extension for ARMv8-A CPUs. 217# For ARMv8.1-A, and onwards CRC instructions are default enabled. 218# Enable HW computed CRC support unconditionally in BL2 component. 219ifeq (${ARM_ARCH_MAJOR},8) 220 ifeq (${ARM_ARCH_MINOR},0) 221 BL2_CPPFLAGS += -march=armv8-a+crc 222 endif 223endif 224 225ifeq ($(PSA_FWU_SUPPORT),1) 226 # GPT support is recommended as per PSA FWU specification hence 227 # PSA FWU implementation is tightly coupled with GPT support, 228 # and it does not support other formats. 229 ifneq ($(ARM_GPT_SUPPORT),1) 230 $(error For PSA_FWU_SUPPORT, ARM_GPT_SUPPORT must be enabled) 231 endif 232 FWU_MK := drivers/fwu/fwu.mk 233 $(info Including ${FWU_MK}) 234 include ${FWU_MK} 235endif 236 237ifeq (${ARCH}, aarch64) 238PLAT_INCLUDES += -Iinclude/plat/arm/common/aarch64 239endif 240 241PLAT_BL_COMMON_SOURCES += plat/arm/common/${ARCH}/arm_helpers.S \ 242 plat/arm/common/arm_common.c \ 243 plat/arm/common/arm_console.c 244 245ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 246PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ 247 lib/xlat_tables/${ARCH}/xlat_tables.c 248else 249include lib/xlat_tables_v2/xlat_tables.mk 250PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 251endif 252 253ARM_IO_SOURCES += plat/arm/common/arm_io_storage.c \ 254 plat/arm/common/fconf/arm_fconf_io.c 255ifeq (${SPD},spmd) 256 ifeq (${BL2_ENABLE_SP_LOAD},1) 257 ARM_IO_SOURCES += plat/arm/common/fconf/arm_fconf_sp.c 258 endif 259endif 260 261BL1_SOURCES += drivers/io/io_fip.c \ 262 drivers/io/io_memmap.c \ 263 drivers/io/io_storage.c \ 264 plat/arm/common/arm_bl1_setup.c \ 265 plat/arm/common/arm_err.c \ 266 ${ARM_IO_SOURCES} 267 268ifdef EL3_PAYLOAD_BASE 269# Need the plat_arm_program_trusted_mailbox() function to release secondary CPUs from 270# their holding pen 271BL1_SOURCES += plat/arm/common/arm_pm.c 272endif 273 274BL2_SOURCES += drivers/delay_timer/delay_timer.c \ 275 drivers/delay_timer/generic_delay_timer.c \ 276 drivers/io/io_fip.c \ 277 drivers/io/io_memmap.c \ 278 drivers/io/io_storage.c \ 279 plat/arm/common/arm_bl2_setup.c \ 280 plat/arm/common/arm_err.c \ 281 common/tf_crc32.c \ 282 ${ARM_IO_SOURCES} 283 284# Firmware Configuration Framework sources 285include lib/fconf/fconf.mk 286 287BL1_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 288BL2_SOURCES += ${FCONF_SOURCES} ${FCONF_DYN_SOURCES} 289 290# Add `libfdt` and Arm common helpers required for Dynamic Config 291include lib/libfdt/libfdt.mk 292 293DYN_CFG_SOURCES += plat/arm/common/arm_dyn_cfg.c \ 294 plat/arm/common/arm_dyn_cfg_helpers.c \ 295 common/uuid.c 296 297DYN_CFG_SOURCES += ${FDT_WRAPPERS_SOURCES} 298 299BL1_SOURCES += ${DYN_CFG_SOURCES} 300BL2_SOURCES += ${DYN_CFG_SOURCES} 301 302ifeq (${RESET_TO_BL2},1) 303BL2_SOURCES += plat/arm/common/arm_bl2_el3_setup.c 304endif 305 306# Because BL1/BL2 execute in AArch64 mode but BL32 in AArch32 we need to use 307# the AArch32 descriptors. 308ifeq (${JUNO_AARCH32_EL3_RUNTIME},1) 309BL2_SOURCES += plat/arm/common/aarch32/arm_bl2_mem_params_desc.c 310else 311ifeq ($(filter $(PLAT), corstone1000 rd1ae rdaspen),) 312BL2_SOURCES += plat/arm/common/${ARCH}/arm_bl2_mem_params_desc.c 313endif 314endif 315BL2_SOURCES += plat/arm/common/arm_image_load.c \ 316 common/desc_image_load.c 317ifeq (${SPD},opteed) 318BL2_SOURCES += lib/optee/optee_utils.c 319endif 320 321BL2U_SOURCES += drivers/delay_timer/delay_timer.c \ 322 drivers/delay_timer/generic_delay_timer.c \ 323 plat/arm/common/arm_bl2u_setup.c 324 325BL31_SOURCES += plat/arm/common/arm_bl31_setup.c \ 326 plat/arm/common/arm_pm.c \ 327 plat/arm/common/arm_topology.c \ 328 plat/common/plat_psci_common.c 329 330ifeq (${PLAT_ARM_ACS_SMC_HANDLER},1) 331BL31_SOURCES += plat/arm/common/plat_acs_smc_handler.c \ 332 ${VENDOR_EL3_SRCS} 333endif 334 335ifeq (${TRANSFER_LIST}, 1) 336include lib/transfer_list/transfer_list.mk 337 338BL1_SOURCES += plat/arm/common/arm_transfer_list.c 339BL2_SOURCES += plat/arm/common/arm_transfer_list.c 340BL31_SOURCES += plat/arm/common/arm_transfer_list.c 341endif 342 343ifneq (${DECRYPTION_SUPPORT},none) 344BL1_SOURCES += drivers/io/io_encrypted.c 345BL2_SOURCES += drivers/io/io_encrypted.c 346endif 347 348ifneq ($(filter 1,${ENABLE_PMF} ${ETHOSN_NPU_DRIVER}),) 349ARM_SVC_HANDLER_SRCS := 350 351ifeq (${ENABLE_PMF},1) 352ARM_SVC_HANDLER_SRCS += lib/pmf/pmf_smc.c 353endif 354 355ifeq (${ETHOSN_NPU_DRIVER},1) 356ARM_SVC_HANDLER_SRCS += plat/arm/common/fconf/fconf_ethosn_getter.c \ 357 drivers/delay_timer/delay_timer.c \ 358 drivers/arm/ethosn/ethosn_smc.c 359ifeq (${ETHOSN_NPU_TZMP1},1) 360ARM_SVC_HANDLER_SRCS += drivers/arm/ethosn/ethosn_big_fw.c 361endif 362endif 363 364ifeq (${ARCH}, aarch64) 365BL31_SOURCES += plat/arm/common/aarch64/execution_state_switch.c\ 366 plat/arm/common/arm_sip_svc.c \ 367 plat/arm/common/plat_arm_sip_svc.c \ 368 ${ARM_SVC_HANDLER_SRCS} 369else 370BL32_SOURCES += plat/arm/common/arm_sip_svc.c \ 371 plat/arm/common/plat_arm_sip_svc.c \ 372 ${ARM_SVC_HANDLER_SRCS} 373endif 374endif 375 376ifeq (${EL3_EXCEPTION_HANDLING},1) 377BL31_SOURCES += plat/common/aarch64/plat_ehf.c 378endif 379 380ifeq (${SDEI_SUPPORT},1) 381BL31_SOURCES += plat/arm/common/aarch64/arm_sdei.c 382ifeq (${SDEI_IN_FCONF},1) 383BL31_SOURCES += plat/arm/common/fconf/fconf_sdei_getter.c 384endif 385endif 386 387# Pointer Authentication sources 388ifeq ($(BRANCH_PROTECTION),$(filter $(BRANCH_PROTECTION),1 2 3 5)) 389PLAT_BL_COMMON_SOURCES += plat/arm/common/aarch64/arm_pauth.c 390endif 391 392ifeq (${SPD},spmd) 393BL31_SOURCES += plat/common/plat_spmd_manifest.c \ 394 common/uuid.c \ 395 ${LIBFDT_SRCS} 396 397BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 398endif 399 400ifeq (${DRTM_SUPPORT},1) 401BL31_SOURCES += plat/arm/common/arm_err.c 402endif 403 404ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 405 PLAT_INCLUDES += -Iplat/arm/common \ 406 -Iinclude/drivers/auth/mbedtls 407 ifeq (${HASH_ALG}, sha512) 408 ARM_ROTPK_HASH_LEN := 64 409 else ifeq (${HASH_ALG}, sha384) 410 ARM_ROTPK_HASH_LEN := 48 411 else 412 ARM_ROTPK_HASH_LEN := 32 413 endif 414 $(eval $(call add_define,ARM_ROTPK_HASH_LEN)) 415endif 416 417ifneq (${TRUSTED_BOARD_BOOT},0) 418 419 # Include common TBB sources 420 AUTH_MK := drivers/auth/auth.mk 421 $(info Including ${AUTH_MK}) 422 include ${AUTH_MK} 423 424 # Include the selected chain of trust sources. 425 ifeq (${COT},tbbr) 426 BL1_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c \ 427 drivers/auth/tbbr/tbbr_cot_bl1.c 428 ifneq (${COT_DESC_IN_DTB},0) 429 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 430 else 431 # Juno has its own TBBR CoT file for BL2 432 ifeq (${PLAT},juno) 433 BL2_SOURCES += drivers/auth/tbbr/tbbr_cot_common.c 434 endif 435 endif 436 else ifeq (${COT},dualroot) 437 BL1_SOURCES += drivers/auth/dualroot/bl1_cot.c 438 ifneq (${COT_DESC_IN_DTB},0) 439 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 440 endif 441 else ifeq (${COT},cca) 442 BL1_SOURCES += drivers/auth/cca/bl1_cot.c 443 ifneq (${COT_DESC_IN_DTB},0) 444 BL2_SOURCES += lib/fconf/fconf_cot_getter.c 445 endif 446 else 447 $(error Unknown chain of trust ${COT}) 448 endif 449 450 ifeq (${COT_DESC_IN_DTB},0) 451 ifeq (${COT},dualroot) 452 COTDTPATH := fdts/dualroot_cot_descriptors.dts 453 else ifeq (${COT},cca) 454 COTDTPATH := fdts/cca_cot_descriptors.dts 455 else ifeq (${COT},tbbr) 456 ifneq (${PLAT},juno) 457 COTDTPATH := fdts/tbbr_cot_descriptors.dts 458 endif 459 endif 460 endif 461 462 BL1_SOURCES += ${AUTH_SOURCES} \ 463 bl1/tbbr/tbbr_img_desc.c \ 464 plat/arm/common/arm_bl1_fwu.c \ 465 plat/common/tbbr/plat_tbbr.c 466 467 BL2_SOURCES += ${AUTH_SOURCES} \ 468 plat/common/tbbr/plat_tbbr.c 469 470 $(eval $(call TOOL_ADD_IMG,ns_bl2u,--fwu,FWU_)) 471 472 IMG_PARSER_LIB_MK := drivers/auth/mbedtls/mbedtls_x509.mk 473 474 $(info Including ${IMG_PARSER_LIB_MK}) 475 include ${IMG_PARSER_LIB_MK} 476endif 477 478# Include Measured Boot makefile before any Crypto library makefile. 479# Crypto library makefile may need default definitions of Measured Boot build 480# flags present in Measured Boot makefile. 481ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 482 MEASURED_BOOT_MK := drivers/measured_boot/event_log/event_log.mk 483 $(info Including ${MEASURED_BOOT_MK}) 484 include ${MEASURED_BOOT_MK} 485 486 ifeq (${MEASURED_BOOT},1) 487 BL1_LIBS += $(LIBEVLOG_LIBS) 488 BL1_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 489 490 BL2_LIBS += $(LIBEVLOG_LIBS) 491 BL2_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 492 493 ifeq (${SPD_tspd},1) 494 BL32_LIBS += $(LIBEVLOG_LIBS) 495 BL32_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 496 endif 497 endif 498 499 ifeq (${DRTM_SUPPORT},1) 500 BL31_LIBS += $(LIBEVLOG_LIBS) 501 BL31_INCLUDE_DIRS += $(LIBEVLOG_INCLUDE_DIRS) 502 endif 503endif 504 505ifneq ($(filter 1,${MEASURED_BOOT} ${DRTM_SUPPORT}),) 506ifeq (${TRUSTED_BOARD_BOOT},0) 507 CRYPTO_SOURCES := drivers/auth/crypto_mod.c 508 BL1_SOURCES += ${CRYPTO_SOURCES} 509 BL2_SOURCES += ${CRYPTO_SOURCES} 510endif 511endif 512 513ifeq (${DRTM_SUPPORT},1) 514 BL31_SOURCES += drivers/auth/crypto_mod.c 515endif 516 517ifneq ($(filter 1,${MEASURED_BOOT} ${TRUSTED_BOARD_BOOT} ${DRTM_SUPPORT}),) 518 FCONF_TBB_SOURCES := lib/fconf/fconf_tbbr_getter.c 519 BL1_SOURCES += ${FCONF_TBB_SOURCES} 520 BL2_SOURCES += ${FCONF_TBB_SOURCES} 521 522 # We expect to locate the *.mk files under the directories specified below 523 CRYPTO_LIB_MK := drivers/auth/mbedtls/mbedtls_crypto.mk 524 525 $(info Including ${CRYPTO_LIB_MK}) 526 include ${CRYPTO_LIB_MK} 527endif 528 529ifeq (${RECLAIM_INIT_CODE}, 1) 530 ifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 531 $(error To reclaim init code xlat tables v2 must be used) 532 endif 533endif 534 535ifneq ($(COTDTPATH),) 536 # no custom flags 537 $(eval $(call MAKE_PRE,$(BUILD_PLAT)/$(COTDTPATH),$(COTDTPATH),$(BUILD_PLAT)/$(COTDTPATH:.dts=.o.d))) 538 539 $(BUILD_PLAT)/$(COTDTPATH:.dts=.c): $(BUILD_PLAT)/$(COTDTPATH) | $$(@D)/ 540 $(if $(host-poetry),$(q)poetry -q install --no-root) 541 $(q)$(if $(host-poetry),poetry run )cot-dt2c convert-to-c $< $@ 542 543 BL2_SOURCES += $(BUILD_PLAT)/$(COTDTPATH:.dts=.c) 544endif 545