1 /* 2 * Copyright 2020-2025 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef DDR_UTILS_H 8 #define DDR_UTILS_H 9 10 #include <stdbool.h> 11 #include <stdlib.h> 12 13 #include <lib/mmio.h> 14 15 #include <platform_def.h> 16 17 /* Possible errors */ 18 #define NO_ERR 0x00000000U 19 #define TIMEOUT_ERR 0x00000002U 20 #define TRAINING_FAILED 0x00000003U 21 #define BITFIELD_EXCEEDED 0x00000004U 22 #define DEASSERT_FAILED 0x00000005U 23 24 #define TRAINING_OK_MSG 0x07U 25 #define TRAINING_FAILED_MSG 0xFFU 26 27 #define APBONLY_DCTWRITEPROT_ACK_EN 0U 28 #define APBONLY_DCTWRITEPROT_ACK_DIS 1U 29 30 /* PHY related */ 31 #define DDR_PHYA_APBONLY_UCTSHADOWREGS 0x40380404U 32 #define UCT_WRITE_PROT_SHADOW_MASK 0x1U 33 #define DDR_PHYA_DCTWRITEPROT 0x4038040CU 34 #define DDR_PHYA_APBONLY_UCTWRITEONLYSHADOW 0x40380410U 35 #define UCT_WRITE_PROT_SHADOW_ACK 0x0U 36 37 /* Default timeout for DDR PHY operations */ 38 #define DEFAULT_TIMEOUT_US 1000000U 39 40 /* Wait until firmware finishes execution and return training result */ 41 uint32_t wait_firmware_execution(void); 42 43 #endif /* DDR_UTILS_H */ 44