| b516b7dc | 26-Jul-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Call set_wakeup_source for all wake devices on sys-suspend
During system suspend, identify slaves which are configured as wake sources and call pm_set_wakeup_source API for each of them.
zynqmp: pm: Call set_wakeup_source for all wake devices on sys-suspend
During system suspend, identify slaves which are configured as wake sources and call pm_set_wakeup_source API for each of them.
Identifying if device may wake the system is done by checking if any interrupt of that device is enabled in GICD_ISENABLER when the APU is about to enter SUSPEND_TO_RAM state. If such interrupt is found, pm_set_wakeup_source is called with corresponding PM node ID as argument.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
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| 6aa4c533 | 26-Jul-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Add PM node IDs for GPU, PCIE, PCAP and RTC
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> |
| 95fd990f | 20-Jul-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Provide state argument to the pm_self_suspend API call
The state argument of the pm_self_suspend API encodes the state to which the APU intends to suspend. The state can be: - PM_APU_STA
zynqmp: pm: Provide state argument to the pm_self_suspend API call
The state argument of the pm_self_suspend API encodes the state to which the APU intends to suspend. The state can be: - PM_APU_STATE_CPU_IDLE - processor power down, all memories remain on - PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$ powered down, all OCM banks in retention and DDR in self-refresh. The calls for setting requirements for L2$ and OCM banks are now redundant and removed.
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> [ sb - remove redundant #defines ] Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
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| eccc7cde | 09-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Add simple implementation of zynqmp_validate_power_state()
Implementation is based on arm_validate_power_state(). This function is called during CPU_SUSPEND PSCI call to validate power_state
zynqmp: Add simple implementation of zynqmp_validate_power_state()
Implementation is based on arm_validate_power_state(). This function is called during CPU_SUSPEND PSCI call to validate power_state parameter. If state is valid this function populate it in req_state array as power domain level specific local state. ATF platform migration guide chapter 2.2 defines this function as mandatory for PSCIv1.0 CPU_SUSPEND support.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
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| 797ab652 | 25-Jul-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Increase MAX_XLAT_TABLES
When moving the ATF into the DRAM address space an additional translation table is required.
Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Sore
zynqmp: Increase MAX_XLAT_TABLES
When moving the ATF into the DRAM address space an additional translation table is required.
Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 0ab6a242 | 15-Jul-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Change default BL31 address space
The OCM space was reorganized to use the space more efficiently. Adjust the default ATF location to be aligned with other ZynqMP software components.
Signe
zynqmp: Change default BL31 address space
The OCM space was reorganized to use the space more efficiently. Adjust the default ATF location to be aligned with other ZynqMP software components.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 06526c97 | 01-Jul-2016 |
Naga Sureshkumar Relli <nagasure@xilinx.com> |
zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1
Arm provided error injection support. To enable this error injection, we need to set L2DEIEN in L2ACTLR_EL1 register and L1DEIEN in CPUACTLR_EL1
zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1
Arm provided error injection support. To enable this error injection, we need to set L2DEIEN in L2ACTLR_EL1 register and L1DEIEN in CPUACTLR_EL1 register.
This is needed for our cortexa53 edac linux driver testing. These registers need write access from non secure EL1 i.e linux at the time of setting the above bits.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
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| 538957d8 | 06-Jul-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Set RESET_TO_BL31 through platform.mk
ZynqMP only supports builds with RESET_TO_BL31=1. Set this option through the platform makefile on default.
Signed-off-by: Soren Brinkmann <soren.brink
zynqmp: Set RESET_TO_BL31 through platform.mk
ZynqMP only supports builds with RESET_TO_BL31=1. Set this option through the platform makefile on default.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 2c239f7c | 17-Jun-2016 |
Mirela Simonovic <mirela.simonovic@aggios.com> |
zynqmp: pm: Added NODE_IPI_RPU_0 node definition in pm_defs
Nodes represent IPI dedicated to the RPU (not accessible by APU)
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> |
| e1cb4da4 | 22-Jun-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Add support for generic_delay_timer
Initialize the generic_delay_timer in the zynqmp port.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| b1271091 | 08-Aug-2016 |
Soby Mathew <soby.mathew@arm.com> |
Migrate platform makefile to new console driver location
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base.
Migrate platform makefile to new console driver location
This patch migrates the upstream platform makefiles to include the console drivers from the new location in ARM Trusted Firmware code base.
Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3
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| 3dd9835f | 25-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #667 from soby-mathew/sm/PSCI_lib
Introduce PSCI library |
| bc149bfc | 07-Jul-2016 |
Soby Mathew <soby.mathew@arm.com> |
Move `arm_common.c` out of aarch64 folder
This patch moves the `arm_common.c` file from `plat/arm/common/aarch64/` to the parent directory since the functions implemented in the file are not AArch64
Move `arm_common.c` out of aarch64 folder
This patch moves the `arm_common.c` file from `plat/arm/common/aarch64/` to the parent directory since the functions implemented in the file are not AArch64 specific. The platform makefiles are also modified for this change.
Change-Id: I776d2e4958f59041476cf2f53a9adb5b2d304ee0
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| bb2162f1 | 03-May-2016 |
Soby Mathew <soby.mathew@arm.com> |
Include `plat_psci_common.c` from the new location
The `plat_psci_common.c` was moved to the new location `plat/common` and a stub file was retained at previous location for compatibility. This patc
Include `plat_psci_common.c` from the new location
The `plat_psci_common.c` was moved to the new location `plat/common` and a stub file was retained at previous location for compatibility. This patch modifies the platform makefiles to include the file from the new location.
Change-Id: Iabddeeb824e9a5d72d176d7c644735966c8c0699
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| 47395a23 | 08-Jul-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Separate code and rodata
Set the SEPARATE_CODE_AND_RODATA build flag to map read-only data as execute never.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| 0af559a8 | 08-Jul-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
ARM platforms: Add support for SEPARATE_CODE_AND_RODATA
The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and re
ARM platforms: Add support for SEPARATE_CODE_AND_RODATA
The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and read-only data mixed up, which was mapped as executable.
This patch changes this behaviour. arm_setup_page_tables() now expects 2 separate sets of addresses:
- the extents of the code section; - the extents of the read-only data section.
The code is mapped as executable, whereas the data is mapped as execute-never. New #defines have been introduced to identify the extents of the code and the read-only data section. Given that all BL images except BL1 share the same memory layout and linker script structure, these #defines are common across these images. The slight memory layout differences in BL1 have been handled by providing values specific to BL1.
Note that this patch also affects the Xilinx platform port, which uses the arm_setup_page_tables() function. It has been updated accordingly, such that the memory mappings on this platform are unchanged. This is achieved by passing null values as the extents of the read-only data section so that it is ignored. As a result, the whole read-only section is still mapped as executable.
Fixes ARM-software/tf-issues#85
Change-Id: I1f95865c53ce6e253a01286ff56e0aa1161abac5
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| ed81f3eb | 05-Jul-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce utils.h header file
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, archit
Introduce utils.h header file
This patch introduces a new header file: include/lib/utils.h. Its purpose is to provide generic macros and helper functions that are independent of any BL image, architecture, platform and even not specific to Trusted Firmware.
For now, it contains only 2 macros: ARRAY_SIZE() and IS_POWER_OF_TWO(). These were previously defined in bl_common.h and xlat_tables.c respectively.
bl_common.h includes utils.h to retain compatibility for platforms that relied on bl_common.h for the ARRAY_SIZE() macro. Upstream platform ports that use this macro have been updated to include utils.h.
Change-Id: I960450f54134f25d1710bfbdc4184f12c049a9a9
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| b5fa6563 | 18-May-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and do
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and does the same thing except that it doesn't enable the MMU at the end. The idea is to reduce the amount of per-EL code that is generated by the C preprocessor by splitting the memory regions definitions and page tables creation (which is generic) from the MMU enablement (which is the only per-EL configuration).
As a consequence, the call to the enable_mmu_elx() function has been moved up into the plat_arch_setup() hook. Any other ARM standard platforms that use the functions `arm_configure_mmu_elx()` must be updated.
Change-Id: I6f12a20ce4e5187b3849a8574aac841a136de83d
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| 6f511c47 | 04-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #651 from Xilinx/zynqmp_uart
zynqmp: Make UART selectable |
| 7de544ac | 10-Jun-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Add option to select between Cadence UARTs
Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@x
zynqmp: Add option to select between Cadence UARTs
Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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| 50f7101a | 15-Jun-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #650 from Xilinx/zynqmp-updates
Zynqmp updates |
| 2ba68959 | 07-Jun-2016 |
Mirela Simonovic <mirela.simonovic@aggios.com> |
zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
NODE_IPI_APU is the node ID of APU's IPI device. If APU should be woken-up on an IPI from FPD power down, this node shall be set as the wake
zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
NODE_IPI_APU is the node ID of APU's IPI device. If APU should be woken-up on an IPI from FPD power down, this node shall be set as the wake-up source upon suspend.
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
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| a29f50c9 | 29-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Remove double ';'
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| 55eae0d4 | 29-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Fix spelling of endianness
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| e3f0391e | 19-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: PSCI: Wait for FW completing wake requests
Powering up cores didn't wait for the PMUFW to complete the request, which could result in cores failing to power up in Linux.
Reported-by: Kotesw
zynqmp: PSCI: Wait for FW completing wake requests
Powering up cores didn't wait for the PMUFW to complete the request, which could result in cores failing to power up in Linux.
Reported-by: Koteswararao Nayudu <kotin@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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