| f5a3688b | 17-Apr-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): manage monotonic counter
The monotonic counter is stored in an OTP fuse. A check is done in TF-A. If the TF-A version is incremented, then the counter will be updated in the correspo
feat(stm32mp1): manage monotonic counter
The monotonic counter is stored in an OTP fuse. A check is done in TF-A. If the TF-A version is incremented, then the counter will be updated in the corresponding OTP.
Change-Id: I6e7831300ca9efbb35b4c87706f2dcab35affacb Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
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| ae3ce8b2 | 04-Nov-2019 |
Lionel Debieve <lionel.debieve@st.com> |
feat(stm32mp1): new way to access platform OTP
Use dt_find_otp_name() to retrieve platform OTP information from device tree, directly or through stm32_get_otp_index() and stm32_get_otp_value() platf
feat(stm32mp1): new way to access platform OTP
Use dt_find_otp_name() to retrieve platform OTP information from device tree, directly or through stm32_get_otp_index() and stm32_get_otp_value() platform services. String definitions replace hard-coded values, they are used to call this new function.
Change-Id: I81213e4a9ad08fddadc2c97b064ae057a4c79561 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 072d7532 | 20-May-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-drivers): improve BSEC driver
Rename driver file to BSEC2. Split header file in IP and feature parts. Add functions to access BSEC scratch register. Several corrections and improvements.
refactor(st-drivers): improve BSEC driver
Rename driver file to BSEC2. Split header file in IP and feature parts. Add functions to access BSEC scratch register. Several corrections and improvements. Probe the driver earlier, especially to check debug features.
Change-Id: I1981536398d598d67a19d2d7766dacc18de72ec1 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| dfbdbd06 | 10-Sep-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1): add NVMEM layout compatibility definition
Used by driver parsing this node to get information.
Change-Id: I50623a497157adf7b9da6fafe8d79f6ff58c0ebc Signed-off-by: Nicolas Le Bayon <
feat(stm32mp1): add NVMEM layout compatibility definition
Used by driver parsing this node to get information.
Change-Id: I50623a497157adf7b9da6fafe8d79f6ff58c0ebc Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| ca88c761 | 09-Mar-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): remove interrupt_provider warning for dtc
This warning can only be removed if the version is newer than v1.6.0.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I472
fix(stm32mp1): remove interrupt_provider warning for dtc
This warning can only be removed if the version is newer than v1.6.0.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I472a8e552305b563447e8148074a5c0970b429e3
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| e1bfbf8a | 19-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): remove unused refcount helper functions
Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(), stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused. The file is then
refactor(stm32mp1): remove unused refcount helper functions
Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(), stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused. The file is then just removed.
Change-Id: I09ee23c02317df5d8f71cbc355d3ed4a67ce2749 Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 356ed961 | 27-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more included. It should then be added to stm32mp1_boot_device.c.
Signed-off-by: Yann Gautier <ya
fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more included. It should then be added to stm32mp1_boot_device.c.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I397911ac05fdff464c010cf3b2e04320a781b4aa
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| ad216c10 | 10-Nov-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the platform.
Currently, this feature is supported on the STM32MP157C-DK2 board,
feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the platform.
Currently, this feature is supported on the STM32MP157C-DK2 board, which boots off a uSD card. Also, support has been enabled when booting from a FIP image.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: Ia69e858461e2daf599d41d66d7ff2ccae0c341c2
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| ba02add9 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one of multiple banks(partitions). Pass the value of bank from
feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one of multiple banks(partitions). Pass the value of bank from which the platform has booted as boot index to the Update Agent. The Update Agent will match this boot index value against the active_index field in the metadata, and update the metadata if there is a mismatch.
Fow now, the mechanism to pass the boot index is platform specific. On the STM32MP1 platform, the boot index value is passed through a memorey mapped TAMP register on the SoC.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: I0aa665ff9c1db95be8ae19ed8de6d866587d6850
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| 0ca180f6 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata partition stores information on the current active bank along with inf
feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata partition stores information on the current active bank along with information on all the FWU updatable images on the platform. This information is then used to identify the image to be booted.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: I66bc5ac718c21a49c504e698b5b1f5c4daed2d08
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| 8dd75531 | 01-Dec-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add logic to select the images to be booted
With the FWU multi bank boot feature enabled, the platform can boot from one of the multiple banks(partitions) containing the firmware ima
feat(stm32mp1): add logic to select the images to be booted
With the FWU multi bank boot feature enabled, the platform can boot from one of the multiple banks(partitions) containing the firmware images. The bank whose firmware components are to be booted is read from the FWU metadata structure -- the image to be booted is thus derived by reading the metadata.
Read the metadata and set the image spec of the corresponding image type to point to the partition from which the image is to be booted.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: I3dfdc7e9202859e917ec4e1f7d1855aad42c6b70
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| 41bd8b9e | 10-Nov-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add GUID's for identifying firmware images to be booted
Add GUID's for identifying the firmware image type. With the FWU multi bank boot feature enabled, these GUID values are used t
feat(stm32mp1): add GUID's for identifying firmware images to be booted
Add GUID's for identifying the firmware image type. With the FWU multi bank boot feature enabled, these GUID values are used to identify the firmware image to be booted. This is done by matching GUID values of images in the io policy table with the Image GUID value that is read from the FWU metadata structure.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: Id9751f02f95fc48ef68e4e3f9f0ddbf6d6319d3c
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| 8d6b4764 | 02-Jul-2021 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
feat(stm32mp1): add GUID values for updatable images
With the FWU multi bank feature enabled, the identification of firmware image type is done using the image type GUID instead of binary_type field
feat(stm32mp1): add GUID values for updatable images
With the FWU multi bank feature enabled, the identification of firmware image type is done using the image type GUID instead of binary_type field.
Add GUID values for the FIP image which can be updated through the FWU firmware update feature. The GUID values are used in identifying the firmware images.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Change-Id: If7d9356aa8d2bb3fbcbc87100e6972f1a1862921
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| d6854cd1 | 27-Jan-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(stm32mp1): use a macro for header size" into integration |
| 8be574bf | 17-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000 in linker script.
Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6 Signed-
refactor(stm32mp1): use a macro for header size
Use STM32MP_HEADER_RESERVED_SIZE macro instead of a fixed value 0x3000 in linker script.
Change-Id: I2702285c15aebaa1304a891c8aaabc949a912ba6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| dea02f4e | 12-Jan-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable high speed mode for pad in low voltage (<2.7V).
Change-Id
feat(stm32mp1): add helper to enable high speed mode in low voltage
This new function is used to fill the register(s) responsible to enable high speed mode for pad in low voltage (<2.7V).
Change-Id: Ib8abc6628bdf51bbe6a866bc6a9bcdeb4a84a8f4 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 1f4513cb | 16-Dec-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers to enable or disable an IO compensation cell.
Change-Id: I65295298a7ece572ae
refactor(stm32mp1): add helpers for IO compensation cells
Add enable_io_comp_cell and disable_io_comp_cell local helpers to enable or disable an IO compensation cell.
Change-Id: I65295298a7ece572ae939e2db93d10b188de0f9e Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| c7a66e72 | 07-Feb-2020 |
Etienne Carriere <etienne.carriere@st.com> |
feat(stm32mp1): use clk_enable/disable functions
Use the clock framework functions in SYSCFG driver instead of dedicated functions.
Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b Signed-off-b
feat(stm32mp1): use clk_enable/disable functions
Use the clock framework functions in SYSCFG driver instead of dedicated functions.
Change-Id: Ifb50a5207e8cecef1c80d86e2de4d70ab6bf8b8b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| de02e9b0 | 18-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1): add timeout in IO compensation
Use a timeout during IO compensation enable function, when waiting for ready status. If timeout expires, print a warning message, to indicate that the
feat(stm32mp1): add timeout in IO compensation
Use a timeout during IO compensation enable function, when waiting for ready status. If timeout expires, print a warning message, to indicate that the SoC recommendation is not followed.
Change-Id: I98c7dcb1364b832f4f4b5fc9a0b85a3741a8af4b Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| d958d10e | 15-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections
Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM can be used. It reduces the binary size by removing all relocation s
feat(stm32mp1): enable BL2_IN_XIP_MEM to remove relocation sections
Because the BL2 is not relocated, the usage of BL2_IN_XIP_MEM can be used. It reduces the binary size by removing all relocation sections. XIP will not be used when STM32MP_USE_STM32IMAGE is defined. Introduce new definitions for SEPARATE_CODE_AND_RODATA.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Ifd76f14e5bc98990bf84e0bfd4ee0b4e49a9a293
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| ac1b24d5 | 16-Jan-2020 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): reduce MMU memory regions and split XLAT by context
Simplify the BL2 MMU mapping and reduce the memory regions number. Split the XLAT define between BL2 and BL32 as binaries do n
refactor(stm32mp1): reduce MMU memory regions and split XLAT by context
Simplify the BL2 MMU mapping and reduce the memory regions number. Split the XLAT define between BL2 and BL32 as binaries do not share the same tables anymore.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iaf09e72b4cc29acbe376f6f1cd2a8116c793ba26
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| 1697ad8c | 15-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st): map 2MB for ROM code
This allows reducing MMU tables, and as there is nothing after ROM code in memory mapping, this has no impact.
Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3 Si
feat(st): map 2MB for ROM code
This allows reducing MMU tables, and as there is nothing after ROM code in memory mapping, this has no impact.
Change-Id: If51facb96a523770465cb06eb1ab400f75d26db3 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| db3e0ece | 17-Sep-2020 |
Yann Gautier <yann.gautier@st.com> |
fix(stm32mp1): restrict DEVICE2 mapping in BL2
Only NAND memory map area can be of interest for BL2 in the DEVICE2 area. Map DEVICE2 under STM32MP_RAW_NAND flag.
Change-Id: I7e3b39579e4a2525b25cb19
fix(stm32mp1): restrict DEVICE2 mapping in BL2
Only NAND memory map area can be of interest for BL2 in the DEVICE2 area. Map DEVICE2 under STM32MP_RAW_NAND flag.
Change-Id: I7e3b39579e4a2525b25cb1987d6ec38038d0de2b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| f7a92518 | 07-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_ddr_updates" into integration
* changes: refactor(st-ddr): move basic tests in a dedicated file refactor(st-ddr): reorganize generic and specific elements feat(stm
Merge changes from topic "st_ddr_updates" into integration
* changes: refactor(st-ddr): move basic tests in a dedicated file refactor(st-ddr): reorganize generic and specific elements feat(stm32mp1): allow configuration of DDR AXI ports number refactor(st-ddr): update parameter array initialization feat(st-ddr): add read valid training support refactor(stm32mp1): remove the support of calibration result fix(st-ddr): correct DDR warnings
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| 9e52d45f | 05-Jan-2022 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(st): manage UART clock and reset only in BL2
As the UART is already initialized, no need to check for UART clock or reset in next BL. An issue can appear if the next BL device tree (e.g HW_CONFI
fix(st): manage UART clock and reset only in BL2
As the UART is already initialized, no need to check for UART clock or reset in next BL. An issue can appear if the next BL device tree (e.g HW_CONFIG) doesn't use the same clocks or resets (like SCMI ones).
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I044ef2386abe2d3dba5a53c3685440d64ca50a4f
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