| 6d797402 | 10-Dec-2020 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(st-drivers): add Memory Cipher Engine driver
Memory Cipher Engine (MCE) defines, in a given address space, one region
with specific security setup (encryption).
FCONF compliance ensures region
feat(st-drivers): add Memory Cipher Engine driver
Memory Cipher Engine (MCE) defines, in a given address space, one region
with specific security setup (encryption).
FCONF compliance ensures region definition through DT.
Change-Id: I1bca9c0a89af88a72651e1a71e3f8950807eec40
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
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| e957c337 | 07-May-2025 |
Gabriel Fernandez <gabriel.fernandez@foss.st.com> |
feat(stm32mp25): add RCC register to display all IWDG flags
Add a new define RCC_C1BOOTRSTSCLRR_IWDGXSYSRSTF to check all IWDG flags.
Change-Id: Id48671ae935e3100d4c42bc341d770f702d661de
Signed-off
feat(stm32mp25): add RCC register to display all IWDG flags
Add a new define RCC_C1BOOTRSTSCLRR_IWDGXSYSRSTF to check all IWDG flags.
Change-Id: Id48671ae935e3100d4c42bc341d770f702d661de
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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| 6fede181 | 13-Mar-2024 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
fix(st-bsec): rename OTPSR field
Update the bit name in BSEC_OTPSR, align with the last ref manual.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3b270406749f2f80d0d224
fix(st-bsec): rename OTPSR field
Update the bit name in BSEC_OTPSR, align with the last ref manual.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I3b270406749f2f80d0d2242bdf368d98d419d798
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| d596023b | 08-Mar-2022 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-ddr): create generic services
Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Fa
refactor(st-ddr): create generic services
Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Factorize by gathering them as services inside the generic part,
and adapt driver to call these new functions.
Add services to manage quasi-dynamic registers. DDRCTRL contains
quasi-dynamic registers, which are dynamic only under some conditions
defined by the user guide (with 4 groups).
In our driver, out of reset state, only groups 3 and 4 are updated.
Group 4 needs only sw_done/sw_done_ack sequence, already available.
Group 3 sequence include more conditions, that are gathered in
specific services. stm32mp_ddr_disable_host_interface() has been added
to do this.
Add dedicated generic service to toggle rfshctl3.refresh_update_level
and wait for completion.
Manage AXI ports and HIF when updating QD3 registers. Quasi-dynamic
group 3 (QD3) registers are updated when DDR is not completely
initialized, i.e. when AXI ports are not enabled and possibly when
host interface (HIF) is not enabled too.
In that case, a specific mechanism is necessary to restore the same
conditions as before accessing QD3 registers.
Static functions have been added to get AXI ports and HIF states and
are used to determine the needed conditions to set/unset.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I880f88b1cb6fc76199ad9ea33e9d63a5c469aed4
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| 1483b3c3 | 29-May-2024 |
Yann Gautier <yann.gautier@st.com> |
refactor(st-ddr): remove name from stm32mp_ddr_reg_desc
It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.
Signed-off-by: Yann Gautier <ya
refactor(st-ddr): remove name from stm32mp_ddr_reg_desc
It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I02e2fc75efd90ff188e62f39850b9bd4c3af1649
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