| d41ebf6e | 04-Dec-2015 |
Juan Castillo <juan.castillo@arm.com> |
Improve memory layout documentation
This patch adds a brief explanation of the top/bottom load approach to the Firmware Design guide and how Trusted Firmware keeps track of the free memory at boot t
Improve memory layout documentation
This patch adds a brief explanation of the top/bottom load approach to the Firmware Design guide and how Trusted Firmware keeps track of the free memory at boot time. This will help platform developers to avoid unexpected results in the memory layout.
Fixes ARM-software/tf-issues#319
Change-Id: I04be7e24c1f3b54d28cac29701c24bf51a5c00ad
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| ef7fb9e4 | 02-Dec-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Porting Guide: Clarify identity-mapping requirement
The memory translation library in Trusted Firmware supports non-identity mappings for Physical to Virtual addresses since commit f984ce84ba. Howev
Porting Guide: Clarify identity-mapping requirement
The memory translation library in Trusted Firmware supports non-identity mappings for Physical to Virtual addresses since commit f984ce84ba. However, the porting guide hasn't been updated accordingly and still mandates the platform ports to use identity-mapped page tables for all addresses.
This patch removes this out-dated information from the Porting Guide and clarifies in which circumstances non-identity mapping may safely be used.
Fixes ARM-software/tf-issues#258
Change-Id: I84dab9f3cabfc43794951b1828bfecb13049f706
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| 143fbef4 | 20-Jan-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Clarify EL3 payload documentation
This patch reworks the section about booting an EL3 payload in the User Guide:
- Centralize all EL3 payload related information in the same section.
- Mentio
Clarify EL3 payload documentation
This patch reworks the section about booting an EL3 payload in the User Guide:
- Centralize all EL3 payload related information in the same section.
- Mention the possibility to program the EL3 payload in flash memory and execute it in place.
- Provide model parameters for both the Base and Foundation FVPs.
- Provide some guidance to boot an EL3 payload on Juno.
Change-Id: I975c8de6b9b54ff4de01a1154cba63271d709912
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| 01fc3f73 | 25-Jan-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #495 from jcastillo-arm/jc/tf-issues/170
ARM plat: add build option to unlock access to non-secure timer |
| 9400b40e | 26-Nov-2015 |
Juan Castillo <juan.castillo@arm.com> |
Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be disabled before any of the control registers are programmed. The PL011 driver included in TF do
Disable PL011 UART before configuring it
The PL011 TRM (ARM DDI 0183G) specifies that the UART must be disabled before any of the control registers are programmed. The PL011 driver included in TF does not disable the UART, so the initialization in BL2 and BL31 is violating this requirement (and potentially in BL1 if the UART is enabled after reset).
This patch modifies the initialization function in the PL011 console driver to disable the UART before programming the control registers.
Register clobber list and documentation updated.
Fixes ARM-software/tf-issues#300
Change-Id: I839b2d681d48b03f821ac53663a6a78e8b30a1a1
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| 0e5dcdd2 | 06-Nov-2015 |
Juan Castillo <juan.castillo@arm.com> |
ARM plat: add build option to unlock access to non-secure timer
Currently, Trusted Firmware on ARM platforms unlocks access to the timer frame registers that will be used by the Non-Secure world. Th
ARM plat: add build option to unlock access to non-secure timer
Currently, Trusted Firmware on ARM platforms unlocks access to the timer frame registers that will be used by the Non-Secure world. This unlock operation should be done by the Non-Secure software itself, instead of relying on secure firmware settings.
This patch adds a new ARM specific build option 'ARM_CONFIG_CNTACR' to unlock access to the timer frame by setting the corresponding bits in the CNTACR<N> register. The frame id <N> is defined by 'PLAT_ARM_NSTIMER_FRAME_ID'. Default value is true (unlock timer access).
Documentation updated accordingly.
Fixes ARM-software/tf-issues#170
Change-Id: Id9d606efd781e43bc581868cd2e5f9c8905bdbf6
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| 84091c48 | 18-Jan-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #493 from yupluo01/yp/tf-issue-fix-doc-links
Update doc links in the porting guide |
| 6b14041b | 15-Jan-2016 |
Yuping Luo <yuping.luo@arm.com> |
Update doc links in the porting guide
GIC v2 and v3 specification references in the porting guide should refer to publically visible links, not ARM internal links.
Change-Id: Ib47c8adda6a03581f23bc
Update doc links in the porting guide
GIC v2 and v3 specification references in the porting guide should refer to publically visible links, not ARM internal links.
Change-Id: Ib47c8adda6a03581f23bcaed72d71c08c7dd9fb1 Signed-off-by: Yuping Luo <yuping.luo@arm.com>
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| 34ac29b6 | 15-Jan-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #489 from sandrine-bailleux/sb/fix-mailbox-doc
Doc: Update out-dated info about Juno's mailbox |
| 6e8bb1e3 | 15-Jan-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Doc: Update out-dated info about Juno's mailbox
Since commit 804040d106, the Juno port has moved from per-CPU mailboxes to a single shared one. This patch updates an out-dated reference to the forme
Doc: Update out-dated info about Juno's mailbox
Since commit 804040d106, the Juno port has moved from per-CPU mailboxes to a single shared one. This patch updates an out-dated reference to the former per-CPU mailboxes mechanism in the Firmware Design.
Change-Id: I355b54156b1ace1b3df4c4416e1e8625211677fc
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| 65cd299f | 14-Jan-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
Remove direct usage of __attribute__((foo))
Migrate all direct usage of __attribute__ to usage of their corresponding macros from cdefs.h. e.g.: - __attribute__((unused)) -> __unused
Signed-off-by
Remove direct usage of __attribute__((foo))
Migrate all direct usage of __attribute__ to usage of their corresponding macros from cdefs.h. e.g.: - __attribute__((unused)) -> __unused
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 6770d65f | 13-Jan-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #485 from jcastillo-arm/jc/max_mmap_reg
Add 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide |
| 359b60d9 | 07-Jan-2016 |
Juan Castillo <juan.castillo@arm.com> |
Add 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide
This patch adds a brief description of 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide. These fields must be defined b
Add 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide
This patch adds a brief description of 'MAX_MMAP_REGIONS' and 'ADDR_SPACE_SIZE' to the Porting Guide. These fields must be defined by the platform in order to use the translation table library.
Change-Id: Ida366458fe2bc01979091a014dc38da0fae5991e
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| fcb22cf0 | 08-Jan-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Documentation: Fix broken links in ToCs
Change-Id: I4fcdb8e813e0392c2cd3d0623698e8319b3b0593 |
| de849c8c | 08-Jan-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Fixes in CPU specific operations framework doc
This patch fixes a couple of issues in the "CPU specific operations framework" section in the Firmware Design document.
* Fix broken link to the CPU
Fixes in CPU specific operations framework doc
This patch fixes a couple of issues in the "CPU specific operations framework" section in the Firmware Design document.
* Fix broken link to the CPU Specific Build Macros document.
* Fix the path to the cortex_a53.S file.
* Fix power levels terminology.
Change-Id: Ib610791eaba13dab2823b7699bb63534bcd1c8fb
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| 8f0617ef | 05-Jan-2016 |
Juan Castillo <juan.castillo@arm.com> |
Apply TBBR naming convention to the fip_create options
The fip_create tool specifies images in the command line using the ARM TF naming convention (--bl2, --bl31, etc), while the cert_create tool us
Apply TBBR naming convention to the fip_create options
The fip_create tool specifies images in the command line using the ARM TF naming convention (--bl2, --bl31, etc), while the cert_create tool uses the TBBR convention (--tb-fw, --soc-fw, etc). This double convention is confusing and should be aligned.
This patch updates the fip_create command line options to follow the TBBR naming convention. Usage examples in the User Guide have been also updated.
NOTE: users that build the FIP by calling the fip_create tool directly from the command line must update the command line options in their scripts. Users that build the FIP by invoking the main ARM TF Makefile should not notice any difference.
Change-Id: I84d602630a2585e558d927b50dfde4dd2112496f
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| d0c104e1 | 22-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #475 from danh-arm/dh/v1.2-final
Final v1.2 release changes |
| ed5e011f | 16-Dec-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Update `change-log.md` for v1.2 release
Change-Id: I23a852fc7d91f91923bb84bc3167a830d1bb7463 |
| 1645d3ee | 17-Dec-2015 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Miscellaneous doc fixes for v1.2
Change-Id: I6f49bd779f2a4d577c6443dd160290656cdbc59b |
| 3f61835b | 21-Dec-2015 |
Dan Handley <dan.handley@arm.com> |
Clarify "Getting the TF source code" in user guide
Remove the following redundant sentence from the user guide, which implies the user should use the TF version from the Linaro release, which was no
Clarify "Getting the TF source code" in user guide
Remove the following redundant sentence from the user guide, which implies the user should use the TF version from the Linaro release, which was not the intention:
"However, the rest of this document assumes that you got the Trusted Firmware as part of the Linaro release."
Also, tidied up the grammar in this section.
Change-Id: I5dae0b68d3683e2a85a7b3c6a31222182a66f6c8
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| 4427379f | 17-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #473 from labapart/documentation-clean-legacy-variables
Documentation: Clean legacy variables in User Guide |
| 6f0be125 | 17-Dec-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #472 from danh-arm/dh/fwu-docs
FWU: Add documentation for Firmware Update feature |
| 84a5d6d6 | 27-Oct-2015 |
Yatharth Kochar <yatharth.kochar@arm.com> |
FWU: Add documentation for Firmware Update feature
This patch adds design documentation for the Firmware Update (FWU) feature in `firmware-update.md`. It provides an overview of FWU, describes the B
FWU: Add documentation for Firmware Update feature
This patch adds design documentation for the Firmware Update (FWU) feature in `firmware-update.md`. It provides an overview of FWU, describes the BL1 SMC interface, and includes diagrams showing an example FWU boot flow and the FWU state machine.
This patch also updates the existing TF documents where needed:
* `porting-guide.md` * `user-guide.md` * `firmware-design.md` * `rt-svc-writers-guide.md` * `trusted_board_boot.md`
Change-Id: Ie6de31544429b18f01327bd763175e218299a4ce Co-Authored-By: Dan Handley <dan.handley@arm.com>
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| 594ad3ce | 17-Dec-2015 |
Olivier Martin <olivier@labapart.com> |
docs/user-guide.md: Remove deprecated `FVP_SHARED_DATA_LOCATION` |
| 6364f98c | 17-Dec-2015 |
Olivier Martin <olivier@labapart.com> |
docs/user-guide.md: Renamed legacy `FVP_TSP_RAM_LOCATION`
`FVP_TSP_RAM_LOCATION` has been renamed into `ARM_TSP_RAM_LOCATION`. |