xref: /rk3399_ARM-atf/plat/xilinx/zynqmp/platform.mk (revision 7a1b2794307bf18cdea975b8897f8cd7e0579fc9)
1# Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
2#
3# Redistribution and use in source and binary forms, with or without
4# modification, are permitted provided that the following conditions are met:
5#
6# Redistributions of source code must retain the above copyright notice, this
7# list of conditions and the following disclaimer.
8#
9# Redistributions in binary form must reproduce the above copyright notice,
10# this list of conditions and the following disclaimer in the documentation
11# and/or other materials provided with the distribution.
12#
13# Neither the name of ARM nor the names of its contributors may be used
14# to endorse or promote products derived from this software without specific
15# prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
21# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27# POSSIBILITY OF SUCH DAMAGE.
28
29ENABLE_PLAT_COMPAT := 0
30PROGRAMMABLE_RESET_ADDRESS := 1
31PSCI_EXTENDED_STATE_ID := 1
32A53_DISABLE_NON_TEMPORAL_HINT := 0
33SEPARATE_CODE_AND_RODATA := 1
34RESET_TO_BL31 := 1
35
36ifdef ZYNQMP_ATF_MEM_BASE
37    $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE))
38
39    ifndef ZYNQMP_ATF_MEM_SIZE
40        $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE")
41    endif
42    $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE))
43
44    ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE
45        $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE))
46    endif
47endif
48
49ifdef ZYNQMP_BL32_MEM_BASE
50    $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE))
51
52    ifndef ZYNQMP_BL32_MEM_SIZE
53        $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE")
54    endif
55    $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE))
56endif
57
58ZYNQMP_CONSOLE	?=	cadence
59$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE}))
60
61PLAT_INCLUDES		:=	-Iinclude/plat/arm/common/			\
62				-Iinclude/plat/arm/common/aarch64/		\
63				-Iplat/xilinx/zynqmp/include/			\
64				-Iplat/xilinx/zynqmp/pm_service/
65
66PLAT_BL_COMMON_SOURCES	:=	lib/xlat_tables/xlat_tables_common.c		\
67				lib/xlat_tables/aarch64/xlat_tables.c		\
68				drivers/delay_timer/delay_timer.c		\
69				drivers/delay_timer/generic_delay_timer.c	\
70				drivers/arm/gic/common/gic_common.c		\
71				drivers/arm/gic/v2/gicv2_main.c			\
72				drivers/arm/gic/v2/gicv2_helpers.c		\
73				drivers/cadence/uart/aarch64/cdns_console.S	\
74				drivers/console/aarch64/console.S		\
75				plat/arm/common/aarch64/arm_helpers.S		\
76				plat/arm/common/arm_cci.c			\
77				plat/arm/common/arm_common.c			\
78				plat/arm/common/arm_gicv2.c			\
79				plat/common/plat_gicv2.c			\
80				plat/common/aarch64/plat_common.c		\
81				plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S	\
82				plat/xilinx/zynqmp/aarch64/zynqmp_common.c
83
84BL31_SOURCES		+=	drivers/arm/cci/cci.c				\
85				lib/cpus/aarch64/aem_generic.S			\
86				lib/cpus/aarch64/cortex_a53.S			\
87				plat/common/plat_psci_common.c			\
88				plat/common/aarch64/platform_mp_stack.S		\
89				plat/xilinx/zynqmp/bl31_zynqmp_setup.c		\
90				plat/xilinx/zynqmp/plat_psci.c			\
91				plat/xilinx/zynqmp/plat_zynqmp.c		\
92				plat/xilinx/zynqmp/plat_startup.c		\
93				plat/xilinx/zynqmp/plat_topology.c		\
94				plat/xilinx/zynqmp/sip_svc_setup.c		\
95				plat/xilinx/zynqmp/pm_service/pm_svc_main.c	\
96				plat/xilinx/zynqmp/pm_service/pm_api_sys.c	\
97				plat/xilinx/zynqmp/pm_service/pm_ipi.c		\
98				plat/xilinx/zynqmp/pm_service/pm_client.c
99
100ifneq (${RESET_TO_BL31},1)
101  $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.")
102endif
103