xref: /rk3399_ARM-atf/lib/psci/psci_private.h (revision 7a1b2794307bf18cdea975b8897f8cd7e0579fc9)
1 /*
2  * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef __PSCI_PRIVATE_H__
32 #define __PSCI_PRIVATE_H__
33 
34 #include <arch.h>
35 #include <bakery_lock.h>
36 #include <bl_common.h>
37 #include <cpu_data.h>
38 #include <pmf.h>
39 #include <psci.h>
40 #include <spinlock.h>
41 
42 /*
43  * The following helper macros abstract the interface to the Bakery
44  * Lock API.
45  */
46 #define psci_lock_init(non_cpu_pd_node, idx)			\
47 	((non_cpu_pd_node)[(idx)].lock_index = (idx))
48 #define psci_lock_get(non_cpu_pd_node)				\
49 	bakery_lock_get(&psci_locks[(non_cpu_pd_node)->lock_index])
50 #define psci_lock_release(non_cpu_pd_node)			\
51 	bakery_lock_release(&psci_locks[(non_cpu_pd_node)->lock_index])
52 
53 /*
54  * The PSCI capability which are provided by the generic code but does not
55  * depend on the platform or spd capabilities.
56  */
57 #define PSCI_GENERIC_CAP	\
58 			(define_psci_cap(PSCI_VERSION) |		\
59 			define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) |	\
60 			define_psci_cap(PSCI_FEATURES))
61 
62 /*
63  * The PSCI capabilities mask for 64 bit functions.
64  */
65 #define PSCI_CAP_64BIT_MASK	\
66 			(define_psci_cap(PSCI_CPU_SUSPEND_AARCH64) |	\
67 			define_psci_cap(PSCI_CPU_ON_AARCH64) |		\
68 			define_psci_cap(PSCI_AFFINITY_INFO_AARCH64) |	\
69 			define_psci_cap(PSCI_MIG_AARCH64) |		\
70 			define_psci_cap(PSCI_MIG_INFO_UP_CPU_AARCH64) |	\
71 			define_psci_cap(PSCI_NODE_HW_STATE_AARCH64) |	\
72 			define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) |	\
73 			define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) |	\
74 			define_psci_cap(PSCI_STAT_COUNT_AARCH64))
75 
76 /*
77  * Helper macros to get/set the fields of PSCI per-cpu data.
78  */
79 #define psci_set_aff_info_state(aff_state) \
80 		set_cpu_data(psci_svc_cpu_data.aff_info_state, aff_state)
81 #define psci_get_aff_info_state() \
82 		get_cpu_data(psci_svc_cpu_data.aff_info_state)
83 #define psci_get_aff_info_state_by_idx(idx) \
84 		get_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state)
85 #define psci_set_aff_info_state_by_idx(idx, aff_state) \
86 		set_cpu_data_by_index(idx, psci_svc_cpu_data.aff_info_state,\
87 					aff_state)
88 #define psci_get_suspend_pwrlvl() \
89 		get_cpu_data(psci_svc_cpu_data.target_pwrlvl)
90 #define psci_set_suspend_pwrlvl(target_lvl) \
91 		set_cpu_data(psci_svc_cpu_data.target_pwrlvl, target_lvl)
92 #define psci_set_cpu_local_state(state) \
93 		set_cpu_data(psci_svc_cpu_data.local_state, state)
94 #define psci_get_cpu_local_state() \
95 		get_cpu_data(psci_svc_cpu_data.local_state)
96 #define psci_get_cpu_local_state_by_idx(idx) \
97 		get_cpu_data_by_index(idx, psci_svc_cpu_data.local_state)
98 
99 /*
100  * Helper macros for the CPU level spinlocks
101  */
102 #define psci_spin_lock_cpu(idx)	spin_lock(&psci_cpu_pd_nodes[idx].cpu_lock)
103 #define psci_spin_unlock_cpu(idx) spin_unlock(&psci_cpu_pd_nodes[idx].cpu_lock)
104 
105 /* Helper macro to identify a CPU standby request in PSCI Suspend call */
106 #define is_cpu_standby_req(is_power_down_state, retn_lvl) \
107 		(((!(is_power_down_state)) && ((retn_lvl) == 0)) ? 1 : 0)
108 
109 /* Following are used as ID's to capture time-stamp */
110 #define PSCI_STAT_ID_ENTER_LOW_PWR		0
111 #define PSCI_STAT_ID_EXIT_LOW_PWR		1
112 #define PSCI_STAT_TOTAL_IDS			2
113 
114 /* Declare PMF service functions for PSCI */
115 PMF_DECLARE_CAPTURE_TIMESTAMP(psci_svc)
116 PMF_DECLARE_GET_TIMESTAMP(psci_svc)
117 
118 /*******************************************************************************
119  * The following two data structures implement the power domain tree. The tree
120  * is used to track the state of all the nodes i.e. power domain instances
121  * described by the platform. The tree consists of nodes that describe CPU power
122  * domains i.e. leaf nodes and all other power domains which are parents of a
123  * CPU power domain i.e. non-leaf nodes.
124  ******************************************************************************/
125 typedef struct non_cpu_pwr_domain_node {
126 	/*
127 	 * Index of the first CPU power domain node level 0 which has this node
128 	 * as its parent.
129 	 */
130 	unsigned int cpu_start_idx;
131 
132 	/*
133 	 * Number of CPU power domains which are siblings of the domain indexed
134 	 * by 'cpu_start_idx' i.e. all the domains in the range 'cpu_start_idx
135 	 * -> cpu_start_idx + ncpus' have this node as their parent.
136 	 */
137 	unsigned int ncpus;
138 
139 	/*
140 	 * Index of the parent power domain node.
141 	 * TODO: Figure out whether to whether using pointer is more efficient.
142 	 */
143 	unsigned int parent_node;
144 
145 	plat_local_state_t local_state;
146 
147 	unsigned char level;
148 
149 	/* For indexing the psci_lock array*/
150 	unsigned char lock_index;
151 } non_cpu_pd_node_t;
152 
153 typedef struct cpu_pwr_domain_node {
154 	u_register_t mpidr;
155 
156 	/*
157 	 * Index of the parent power domain node.
158 	 * TODO: Figure out whether to whether using pointer is more efficient.
159 	 */
160 	unsigned int parent_node;
161 
162 	/*
163 	 * A CPU power domain does not require state coordination like its
164 	 * parent power domains. Hence this node does not include a bakery
165 	 * lock. A spinlock is required by the CPU_ON handler to prevent a race
166 	 * when multiple CPUs try to turn ON the same target CPU.
167 	 */
168 	spinlock_t cpu_lock;
169 } cpu_pd_node_t;
170 
171 /*******************************************************************************
172  * Data prototypes
173  ******************************************************************************/
174 extern const plat_psci_ops_t *psci_plat_pm_ops;
175 extern non_cpu_pd_node_t psci_non_cpu_pd_nodes[PSCI_NUM_NON_CPU_PWR_DOMAINS];
176 extern cpu_pd_node_t psci_cpu_pd_nodes[PLATFORM_CORE_COUNT];
177 extern unsigned int psci_caps;
178 
179 /* One bakery lock is required for each non-cpu power domain */
180 DECLARE_BAKERY_LOCK(psci_locks[PSCI_NUM_NON_CPU_PWR_DOMAINS]);
181 
182 /*******************************************************************************
183  * SPD's power management hooks registered with PSCI
184  ******************************************************************************/
185 extern const spd_pm_ops_t *psci_spd_pm;
186 
187 /*******************************************************************************
188  * Function prototypes
189  ******************************************************************************/
190 /* Private exported functions from psci_common.c */
191 int psci_validate_power_state(unsigned int power_state,
192 			      psci_power_state_t *state_info);
193 void psci_query_sys_suspend_pwrstate(psci_power_state_t *state_info);
194 int psci_validate_mpidr(u_register_t mpidr);
195 void psci_init_req_local_pwr_states(void);
196 void psci_get_target_local_pwr_states(unsigned int end_pwrlvl,
197 				      psci_power_state_t *target_state);
198 int psci_validate_entry_point(entry_point_info_t *ep,
199 			uintptr_t entrypoint, u_register_t context_id);
200 void psci_get_parent_pwr_domain_nodes(unsigned int cpu_idx,
201 				      unsigned int end_lvl,
202 				      unsigned int node_index[]);
203 void psci_do_state_coordination(unsigned int end_pwrlvl,
204 				psci_power_state_t *state_info);
205 void psci_acquire_pwr_domain_locks(unsigned int end_pwrlvl,
206 				   unsigned int cpu_idx);
207 void psci_release_pwr_domain_locks(unsigned int end_pwrlvl,
208 				   unsigned int cpu_idx);
209 int psci_validate_suspend_req(const psci_power_state_t *state_info,
210 			      unsigned int is_power_down_state_req);
211 unsigned int psci_find_max_off_lvl(const psci_power_state_t *state_info);
212 unsigned int psci_find_target_suspend_lvl(const psci_power_state_t *state_info);
213 void psci_set_pwr_domains_to_run(unsigned int end_pwrlvl);
214 void psci_print_power_domain_map(void);
215 unsigned int psci_is_last_on_cpu(void);
216 int psci_spd_migrate_info(u_register_t *mpidr);
217 
218 /* Private exported functions from psci_on.c */
219 int psci_cpu_on_start(u_register_t target_cpu,
220 		      entry_point_info_t *ep);
221 
222 void psci_cpu_on_finish(unsigned int cpu_idx,
223 			psci_power_state_t *state_info);
224 
225 /* Private exported functions from psci_off.c */
226 int psci_do_cpu_off(unsigned int end_pwrlvl);
227 
228 /* Private exported functions from psci_suspend.c */
229 void psci_cpu_suspend_start(entry_point_info_t *ep,
230 			unsigned int end_pwrlvl,
231 			psci_power_state_t *state_info,
232 			unsigned int is_power_down_state_req);
233 
234 void psci_cpu_suspend_finish(unsigned int cpu_idx,
235 			psci_power_state_t *state_info);
236 
237 /* Private exported functions from psci_helpers.S */
238 void psci_do_pwrdown_cache_maintenance(unsigned int pwr_level);
239 void psci_do_pwrup_cache_maintenance(void);
240 
241 /* Private exported functions from psci_system_off.c */
242 void __dead2 psci_system_off(void);
243 void __dead2 psci_system_reset(void);
244 
245 /* Private exported functions from psci_stat.c */
246 void psci_stats_update_pwr_down(unsigned int end_pwrlvl,
247 			const psci_power_state_t *state_info);
248 void psci_stats_update_pwr_up(unsigned int end_pwrlvl,
249 			const psci_power_state_t *state_info,
250 			unsigned int flags);
251 u_register_t psci_stat_residency(u_register_t target_cpu,
252 			unsigned int power_state);
253 u_register_t psci_stat_count(u_register_t target_cpu,
254 			unsigned int power_state);
255 
256 #endif /* __PSCI_PRIVATE_H__ */
257