| d6c26ade | 28-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1006 from robertovargas-arm/doc-format
Improve format of exception vectors in BL1 description |
| 7e3f1d9c | 19-Jun-2017 |
Roberto Vargas <roberto.vargas@arm.com> |
Improve format of exception vectors in BL1 description
Without the additional newlines all the text becomes a single paragraph
and next newlines are ignored.
Change-Id: I783198477f654e3923fcabb2124
Improve format of exception vectors in BL1 description
Without the additional newlines all the text becomes a single paragraph
and next newlines are ignored.
Change-Id: I783198477f654e3923fcabb21248f2bc62c33e9d
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 0731f7eb | 22-Jun-2017 |
Douglas Raillard <douglas.raillard@arm.com> |
Fix broken link in documentation
Fix link in docs/firmware-update.md and docs/change-log.md:
https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Image-Terminology
Change-
Fix broken link in documentation
Fix link in docs/firmware-update.md and docs/change-log.md:
https://github.com/ARM-software/arm-trusted-firmware/wiki/ARM-Trusted-Firmware-Image-Terminology
Change-Id: I2d51d373fd0f7da59b548cd6bed52c47772014fd
Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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| d832aee9 | 23-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
aarch64: Enable Statistical Profiling Extensions for lower ELs
SPE is only supported in non-secure state. Accesses to SPE specific
registers from SEL1 will trap to EL3. During a world switch, befo
aarch64: Enable Statistical Profiling Extensions for lower ELs
SPE is only supported in non-secure state. Accesses to SPE specific
registers from SEL1 will trap to EL3. During a world switch, before
`TTBR` is modified the SPE profiling buffers are drained. This is to
avoid a potential invalid memory access in SEL1.
SPE is architecturally specified only for AArch64.
Change-Id: I04a96427d9f9d586c331913d815fdc726855f6b0
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| 18f2efd6 | 13-Apr-2017 |
David Cunado <david.cunado@arm.com> |
Fully initialise essential control registers
This patch updates the el3_arch_init_common macro so that it fully
initialises essential control registers rather then relying on hardware
to set the res
Fully initialise essential control registers
This patch updates the el3_arch_init_common macro so that it fully
initialises essential control registers rather then relying on hardware
to set the reset values.
The context management functions are also updated to fully initialise
the appropriate control registers when initialising the non-secure and
secure context structures and when preparing to leave EL3 for a lower
EL.
This gives better alignement with the ARM ARM which states that software
must initialise RES0 and RES1 fields with 0 / 1.
This patch also corrects the following typos:
"NASCR definitions" -> "NSACR definitions"
Change-Id: Ia8940b8351dc27bc09e2138b011e249655041cfc
Signed-off-by: David Cunado <david.cunado@arm.com>
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| 63b3a28e | 15-May-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: add TSP support
Add TSP to test BL32 without relying on external projects.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
| d8e919c7 | 03-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
uniphier: support Socionext UniPhier platform
Initial commit for Socionext UniPhier SoC support. BL1, Bl2, and
BL31 are supported. Refer to docs/plat/socionext-uniphier.md for
more detais.
Signed
uniphier: support Socionext UniPhier platform
Initial commit for Socionext UniPhier SoC support. BL1, Bl2, and
BL31 are supported. Refer to docs/plat/socionext-uniphier.md for
more detais.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| 7fe08b2b | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: add document
Add document on HiKey960 platform and how to build.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| f9a050e4 | 06-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #969 from Summer-ARM/sq/update-doc
Update the path for firmware_image_package.h in firmware-design.md |
| b32e6b2b | 05-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #963 from soby-mathew/sm/scmi_dev
Add SCMI power domain and system power protocol support |
| c66f4ade | 05-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #961 from jeenu-arm/gic-600
Introduce ARM GIC-600 driver |
| c04a3b6c | 14-Nov-2016 |
Soby Mathew <soby.mathew@arm.com> |
CSS: Add SCMI driver for SCP
This patch adds the SCMI driver for communicating with SCP. The power
domain management and system power management protocol of the SCMI
specification[1] is implemented
CSS: Add SCMI driver for SCP
This patch adds the SCMI driver for communicating with SCP. The power
domain management and system power management protocol of the SCMI
specification[1] is implemented in the driver. The SCP power management
abstraction layer for SCMI for CSS power management is also added.
A new buid option `CSS_USE_SCMI_DRIVER` is introduced to select SCMI
driver over SCPI.
[1] ARM System Control and Management Interface v1.0 (SCMI)
Document number: ARM DEN 0056A
Change-Id: I67265615a17e679a2afe810b9b0043711ba09dbb
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 175bc85e | 10-Apr-2017 |
Summer Qin <summer.qin@arm.com> |
Update the path for firmware_image_package.h in firmware-design.md
Change-Id: Ic0a9b3c6d212e7171b37f944e11f079282dcce87
Signed-off-by: Summer Qin <summer.qin@arm.com> |
| 9d6fc3c3 | 12-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
FWU: Introduce FWU_SMC_IMAGE_RESET
This SMC is as a means for the image loading state machine to go from
COPYING, COPIED or AUTHENTICATED states to RESET state. Previously, this
was only done when t
FWU: Introduce FWU_SMC_IMAGE_RESET
This SMC is as a means for the image loading state machine to go from
COPYING, COPIED or AUTHENTICATED states to RESET state. Previously, this
was only done when the authentication of an image failed or when the
execution of the image finished.
Documentation updated.
Change-Id: Ida6d4c65017f83ae5e27465ec36f54499c6534d9
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 128daee2 | 01-Jun-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
FWU: Check for overlaps when loading images
Added checks to FWU_SMC_IMAGE_COPY to prevent loading data into a
memory region where another image data is already loaded.
Without this check, if two im
FWU: Check for overlaps when loading images
Added checks to FWU_SMC_IMAGE_COPY to prevent loading data into a
memory region where another image data is already loaded.
Without this check, if two images are configured to be loaded in
overlapping memory regions, one of them can be loaded and
authenticated and the copy function is still able to load data from
the second image on top of the first one. Since the first image is
still in authenticated state, it can be executed, which could lead to
the execution of unauthenticated arbitrary code of the second image.
Firmware update documentation updated.
Change-Id: Ib6871e569794c8e610a5ea59fe162ff5dcec526c
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 79eb1aff | 12-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove `DISABLE_PEDANTIC` build option
It doesn't make sense to use the `-pedantic` flag when building the
Trusted Firmware as we use GNU extensions and so our code is not
fully ISO C compliant. Thi
Remove `DISABLE_PEDANTIC` build option
It doesn't make sense to use the `-pedantic` flag when building the
Trusted Firmware as we use GNU extensions and so our code is not
fully ISO C compliant. This flag only makes sense if the code intends to
be ISO C compliant.
Change-Id: I6273564112759ff57f03b273f5349733a5f38aef
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| e1c59ab3 | 06-Dec-2016 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Introduce ARM GIC-600 driver
ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
implements a power control register in the Redistributor frame. This
register must be programmed t
Introduce ARM GIC-600 driver
ARM GIC-600 IP complies with ARM GICv3 architecture, but among others,
implements a power control register in the Redistributor frame. This
register must be programmed to mark the frame as powered on, before
accessing other registers in the frame. Rest of initialization sequence
remains the same.
The driver provides APIs for Redistributor power management, and
overrides those in the generic GICv3 driver. The driver data is shared
between generic GICv3 driver and that of GIC-600.
For FVP platform, the GIC-600 driver is chosen when FVP_USE_GIC_DRIVER
is set to FVP_GIC600. Also update user guide.
Change-Id: I321b2360728d69f6d4b0a747b2cfcc3fe5a20d67
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 572e1413 | 30-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #949 from antonio-nino-diaz-arm/an/printf-memory
Reduce code size when building with Trusted Board Boot enabled |
| 3d3b02d9 | 24-May-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: add hikey support
Add the description on hikey and how to build.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 82377083 | 15-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
docs: Add note on how to build TF using clang or armclang
Change-Id: I92fd2fb920fcfc31bfcdadae787d8c84c5ca463b
Signed-off-by: dp-arm <dimitris.papastamos@arm.com> |
| e715e676 | 24-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #938 from masahir0y/tools_share
Collect headers shared between TF and host-tools into include/tools_share |
| d77b98ca | 24-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
mbedtls: Use `MBEDTLS_SHA256_SMALLER` in ARM platforms
This options enables an implementation of SHA-256 that has a smaller
code footprint (~1.6 KB less) but is also ~30% slower. For ARM
platforms,
mbedtls: Use `MBEDTLS_SHA256_SMALLER` in ARM platforms
This options enables an implementation of SHA-256 that has a smaller
code footprint (~1.6 KB less) but is also ~30% slower. For ARM
platforms, code size is currently considered more important than
execution speed in the mbed TLS crypto module.
Added a small note about this option to the documentation of the
authentication framework.
Change-Id: I4c0b221ea5d3466465261316ba07b627fa01b233
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| bb41eb7a | 22-May-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
cert: move platform_oid.h to include/tools_share for all platforms
Platforms aligned with TBBR are supposed to use their own OIDs, but
defining the same macros with different OIDs does not provide a
cert: move platform_oid.h to include/tools_share for all platforms
Platforms aligned with TBBR are supposed to use their own OIDs, but
defining the same macros with different OIDs does not provide any
value (at least technically).
For easier use of TBBR, this commit allows platforms to reuse the OIDs
obtained by ARM Ltd. This will be useful for non-ARM vendors that
do not need their own extension fields in their certificate files.
The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h
Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by
defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the
backward compatibility.
For clarification, I inserted a blank line between headers from the
include/ directory (#include <...>) and ones from a local directory
(#include "..." ).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| c1de3fdd | 22-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #947 from davidcunado-arm/dc/update_userguide
Migrate to Linaro Release 17.01 |
| 218888de | 19-May-2017 |
David Cunado <david.cunado@arm.com> |
Migrate to Linaro Release 17.01
This Linaro release updates just the binaries:
Linaro binaries upgraded 16.12 --> 17.01
The toolchain remains at 5.3-2015.05 (gcc 5.3) for both AArch64
and AArch32.
Migrate to Linaro Release 17.01
This Linaro release updates just the binaries:
Linaro binaries upgraded 16.12 --> 17.01
The toolchain remains at 5.3-2015.05 (gcc 5.3) for both AArch64
and AArch32.
The ARM TF codebase has been tested against these new binaries. This patch
updates the User Guide to reflect that the 17.01 release is now a supported
Linaro Release.
Change-Id: I83c579dabd3fa9861ba0d41507036efbd87abcb5
Signed-off-by: David Cunado <david.cunado@arm.com>
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