xref: /rk3399_ARM-atf/include/plat/common/common_def.h (revision 10bcd761574a5aaa208041382399e05275011603)
1 /*
2  * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 #ifndef __COMMON_DEF_H__
31 #define __COMMON_DEF_H__
32 
33 #include <bl_common.h>
34 #include <platform_def.h>
35 
36 /******************************************************************************
37  * Required platform porting definitions that are expected to be common to
38  * all platforms
39  *****************************************************************************/
40 
41 /*
42  * Platform binary types for linking
43  */
44 #ifdef AARCH32
45 #define PLATFORM_LINKER_FORMAT          "elf32-littlearm"
46 #define PLATFORM_LINKER_ARCH            arm
47 #else
48 #define PLATFORM_LINKER_FORMAT          "elf64-littleaarch64"
49 #define PLATFORM_LINKER_ARCH            aarch64
50 #endif /* AARCH32 */
51 
52 /*
53  * Generic platform constants
54  */
55 #define FIRMWARE_WELCOME_STR		"Booting Trusted Firmware\n"
56 
57 /*
58  * Some of the platform porting definitions use the 'ull' suffix in order to
59  * avoid subtle integer overflow errors due to implicit integer type promotion
60  * when working with 32-bit values.
61  *
62  * The TSP linker script includes some of these definitions to define the BL32
63  * memory map, but the GNU LD does not support the 'ull' suffix, causing the
64  * build process to fail. To solve this problem, the auxiliary macro MAKE_ULL(x)
65  * will add the 'ull' suffix only when the macro __LINKER__  is not defined
66  * (__LINKER__ is defined in the command line to preprocess the linker script).
67  * Constants in the linker script will not have the 'ull' suffix, but this is
68  * not a problem since the linker evaluates all constant expressions to 64 bit
69  * (assuming the target architecture is 64 bit).
70  */
71 #ifndef __LINKER__
72   #define MAKE_ULL(x)			x##ull
73 #else
74   #define MAKE_ULL(x)			x
75 #endif
76 
77 #if LOAD_IMAGE_V2
78 #define BL2_IMAGE_DESC {				\
79 	.image_id = BL2_IMAGE_ID,			\
80 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
81 		VERSION_2, image_info_t, 0),		\
82 	.image_info.image_base = BL2_BASE,		\
83 	.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
84 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
85 		VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
86 	.ep_info.pc = BL2_BASE,				\
87 }
88 #else /* LOAD_IMAGE_V2 */
89 #define BL2_IMAGE_DESC {				\
90 	.image_id = BL2_IMAGE_ID,			\
91 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
92 		VERSION_1, image_info_t, 0),		\
93 	.image_info.image_base = BL2_BASE,		\
94 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
95 		VERSION_1, entry_point_info_t, SECURE | EXECUTABLE),\
96 	.ep_info.pc = BL2_BASE,				\
97 }
98 #endif /* LOAD_IMAGE_V2 */
99 
100 /*
101  * The following constants identify the extents of the code & read-only data
102  * regions. These addresses are used by the MMU setup code and therefore they
103  * must be page-aligned.
104  *
105  * When the code and read-only data are mapped as a single atomic section
106  * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
107  * code by specifying the read-only data section as empty.
108  *
109  * BL1 is different than the other images in the sense that its read-write data
110  * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
111  * run-time. Therefore, the read-write data in ROM can be mapped with the same
112  * memory attributes as the read-only data region. For this reason, BL1 uses
113  * different macros.
114  *
115  * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
116  * just points to the end of BL1's actual content in Trusted ROM. Therefore it
117  * needs to be rounded up to the next page size in order to map the whole last
118  * page of it with the right memory attributes.
119  */
120 #if SEPARATE_CODE_AND_RODATA
121 #define BL_CODE_BASE		(unsigned long)(&__TEXT_START__)
122 #define BL_CODE_END		(unsigned long)(&__TEXT_END__)
123 #define BL_RO_DATA_BASE		(unsigned long)(&__RODATA_START__)
124 #define BL_RO_DATA_END		(unsigned long)(&__RODATA_END__)
125 
126 #define BL1_CODE_END		BL_CODE_END
127 #define BL1_RO_DATA_BASE	(unsigned long)(&__RODATA_START__)
128 #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
129 #else
130 #define BL_CODE_BASE		(unsigned long)(&__RO_START__)
131 #define BL_CODE_END		(unsigned long)(&__RO_END__)
132 #define BL_RO_DATA_BASE		0
133 #define BL_RO_DATA_END		0
134 
135 #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
136 #define BL1_RO_DATA_BASE	0
137 #define BL1_RO_DATA_END		0
138 #endif /* SEPARATE_CODE_AND_RODATA */
139 
140 /*
141  * The next 2 constants identify the extents of the coherent memory region.
142  * These addresses are used by the MMU setup code and therefore they must be
143  * page-aligned.  It is the responsibility of the linker script to ensure that
144  * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
145  * page-aligned addresses.
146  */
147 #define BL_COHERENT_RAM_BASE	(unsigned long)(&__COHERENT_RAM_START__)
148 #define BL_COHERENT_RAM_END	(unsigned long)(&__COHERENT_RAM_END__)
149 
150 #endif /* __COMMON_DEF_H__ */
151