| cfe1506e | 20-Mar-2021 |
Aditya Angadi <aditya.angadi@arm.com> |
feat(plat/sgi): introduce platform variant build option
A Neoverse reference design platform can have two or more variants that
differ in core count, cluster count or other peripherals. To allow reu
feat(plat/sgi): introduce platform variant build option
A Neoverse reference design platform can have two or more variants that
differ in core count, cluster count or other peripherals. To allow reuse
of platform code across all the variants of a platform, introduce build
option CSS_SGI_PLATFORM_VARIANT for Arm Neoverse reference design
platforms. The range of allowed values for the build option is platform
specific. The recommended range is an interval of non negative integers.
An example usage of the build option is
make PLAT=rdn2 CSS_SGI_PLATFORM_VARIANT=1
Change-Id: Iaae79c0b4d0dc700521bf6e9b4979339eafe0359
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
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| 303f543e | 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "sgm775_deprecation" into integration
* changes:
build: deprecate Arm sgm775 FVP platform
docs: introduce process for platform deprecation |
| a92b0256 | 26-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek:
Merge changes I20c73f6e,I9962263c,I177796e3,I6ff6875c,I21fe9d85, ... into integration
* changes:
mediatek: mt8195: add rtc power off sequence
mediatek: mt8195: add power-off support
mediatek: mt8195: Add reboot function for PSCI
mediatek: mt8195: Add gpio driver
mediatek: mt8195: Add SiP service
mediatek: mt8195: Add CPU hotplug and MCDI support
mediatek: mt8195: Add MCDI drivers
mediatek: mt8195: Add SPMC driver
mediatek: mt8195: Initialize delay_timer
mediatek: mt8195: initialize systimer
mediatek: mt8192: move timer driver to common folder
mediatek: mt8195: add sys_cirq support
mediatek: mt8195: initialize GIC
Initialize platform for MediaTek MT8195
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| 3dbbbca2 | 26-Apr-2021 |
Chris Kay <chris.kay@arm.com> |
docs(license): rectify `arm-gic.h` license
The `arm-gic.h` file distributed by the Linux kernel is disjunctively
dual-licensed under the GPL-2.0 or MIT licenses, but the BSD-3-Clause
license has bee
docs(license): rectify `arm-gic.h` license
The `arm-gic.h` file distributed by the Linux kernel is disjunctively
dual-licensed under the GPL-2.0 or MIT licenses, but the BSD-3-Clause
license has been applied in violation of the requirements of both
licenses. This change ensures the file is correctly licensed under the
terms of the MIT license, and that we comply with it by distributing a
copy of the license text.
Change-Id: Ie90066753a5eb8c0e2fc95ba43e3f5bcbe2fa459
Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 37ee58d1 | 22-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
build: deprecate Arm sgm775 FVP platform
sgm775 is an old platform and is no longer maintained by Arm and its
fast model FVP_CSS_SGM-775 is no longer available for download.
This platform is now sup
build: deprecate Arm sgm775 FVP platform
sgm775 is an old platform and is no longer maintained by Arm and its
fast model FVP_CSS_SGM-775 is no longer available for download.
This platform is now superseded by Total Compute(tc) platforms.
This platform is now deprecated but the source will be kept for cooling
off period of 2 release cycle before removing it completely.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I8fe1fc3da0c508dba62ed4fc60cbc1642e0f7f2a
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| 67e3a890 | 22-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
docs: introduce process for platform deprecation
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ifb8a3220f2fc2286fa91614887d17f54178ed002 |
| 174a1cfe | 19-Mar-2021 |
Yidi Lin <yidi.lin@mediatek.com> |
Initialize platform for MediaTek MT8195
- Add basic platform setup
- Add MT8195 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address
Change-Id: I7978e2f32e589
Initialize platform for MediaTek MT8195
- Add basic platform setup
- Add MT8195 documentation at docs/plat/
- Add generic CPU helper functions
- Add basic register address
Change-Id: I7978e2f32e58900e5cf93f741ee8eaf8b8e3b842
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
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| a05b3ad0 | 22-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "my-topic-name" into integration
* changes:
plat: imx8mm: Add in BL2 with FIP
plat: imx8mm: Enable Trusted Boot |
| 1d1e5006 | 21-Apr-2021 |
Mark Dykes <mark.dykes@arm.com> |
Merge "Add documentation for SMMUv3 driver in Hafnium(SPM)" into integration |
| 4324a14b | 05-Oct-2020 |
Yann Gautier <yann.gautier@st.com> |
Add PIE support for AARCH32
Only BL32 (SP_min) is supported at the moment, BL1 and BL2_AT_EL3 are just
stubbed with _pie_fixup_size=0.
The changes are an adaptation for AARCH32 on what has been done
Add PIE support for AARCH32
Only BL32 (SP_min) is supported at the moment, BL1 and BL2_AT_EL3 are just
stubbed with _pie_fixup_size=0.
The changes are an adaptation for AARCH32 on what has been done for
PIE support on AARCH64.
The RELA_SECTION is redefined for AARCH32, as the created section is
.rel.dyn and the symbols are .rel*.
Change-Id: I92bafe70e6b77735f6f890f32f2b637b98cf01b9
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 745df305 | 21-Apr-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "ck/conventional-commits" into integration
* changes:
build(hooks): add commitlint hook
build(hooks): add Commitizen hook
build(hooks): add Gerrit hook
build(hooks):
Merge changes from topic "ck/conventional-commits" into integration
* changes:
build(hooks): add commitlint hook
build(hooks): add Commitizen hook
build(hooks): add Gerrit hook
build(hooks): add Husky configuration
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| 89a05821 | 21-Apr-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "od/ns-interrupts" into integration
* changes:
spmd: add FFA_INTERRUPT forwarding
doc: spm: update messaging method field |
| 2480e4c3 | 25-Sep-2020 |
Manish Pandey <manish.pandey2@arm.com> |
doc: spm: update messaging method field
As per FF-A v1.0 spec, Table 3.1, messaging method field also contains
information about whether partition supports managed exit or not.
Since a partition can
doc: spm: update messaging method field
As per FF-A v1.0 spec, Table 3.1, messaging method field also contains
information about whether partition supports managed exit or not.
Since a partition can support managed exit only if it supports direct
messaging, so there are two new possible values, managed exit with only
direct messaging or with both messaging methods.
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: Ic77cfb37d70975c3a36c56f8b7348d385735f378
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| 76a21174 | 12-Feb-2021 |
Mikael Olsson <mikael.olsson@arm.com> |
Add SiP service to configure Arm Ethos-N NPU
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode
the non-secure world cannot access the registers needed to use the NPU.
To still
Add SiP service to configure Arm Ethos-N NPU
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode
the non-secure world cannot access the registers needed to use the NPU.
To still allow the non-secure world to use the NPU, a SiP service has
been added that can delegate non-secure access to the registers needed
to use it.
Only the HW_CONFIG for the Arm Juno platform has been updated to include
the device tree for the NPU and the platform currently only loads the
HW_CONFIG in AArch64 builds.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I65dfd864042ed43faae0a259dcf319cbadb5f3d2
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| 5d5fb10f | 12-Feb-2021 |
Mikael Olsson <mikael.olsson@arm.com> |
plat/arm/juno: Add support to use hw_config in BL31
To make it possible to use the hw_config device tree for dynamic
configuration in BL31 on the Arm Juno platform. A placeholder hw_config
has been
plat/arm/juno: Add support to use hw_config in BL31
To make it possible to use the hw_config device tree for dynamic
configuration in BL31 on the Arm Juno platform. A placeholder hw_config
has been added that is included in the FIP and a Juno specific BL31
setup has been added to populate fconf with the hw_config.
Juno's BL2 setup has been updated to align it with the new behavior
implemented in the Arm FVP platform, where fw_config is passed in arg1
to BL31 instead of soc_fw_config. The BL31 setup is expected to use the
fw_config passed in arg1 to find the hw_config.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: Ib3570faa6714f92ab8451e8f1e59779dcf19c0b6
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| a9e14e20 | 20-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware" into integration |
| 718dbcac | 12-Oct-2020 |
Konstantin Porotchkin <kostap@marvell.com> |
plat/marvell/armada: allow builds without MSS support
Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2
definition.
Images build with MSS_SUPPORT=0 will not include service CPUs
FW and w
plat/marvell/armada: allow builds without MSS support
Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2
definition.
Images build with MSS_SUPPORT=0 will not include service CPUs
FW and will not support PM, FC and other features implemented
in these FW images.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Change-Id: Idf301ebd218ce65a60f277f3876d0aeb6c72f105
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/37769
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
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| 4ec3ccb4 | 28-Feb-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Add documentation for SMMUv3 driver in Hafnium(SPM)
Change-Id: I0b38c114fd2958d2b4040585611cafa132ccfd9c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
| d97bade1 | 09-Dec-2020 |
Chris Kay <chris.kay@arm.com> |
build(hooks): add commitlint hook
This change adds a configuration for commitlint - a tool designed to
enforce a particular commit message style - and run it as part of Git's
commit-msg hook. This v
build(hooks): add commitlint hook
This change adds a configuration for commitlint - a tool designed to
enforce a particular commit message style - and run it as part of Git's
commit-msg hook. This validates commits immediately after the editor has
been exited, and the configuration is derived from the configuration we
provide to Commitizen.
While the configuration provided suggests a maximum header and body
length, neither of these are hard errors. This is to accommodate the
occasional commit where it may be difficult or impossible to comply
with the length requirements (for example, with a particularly long
scope, or a long URL in the message body).
Change-Id: Ib5e90472fd1f1da9c2bff47703c9682232ee5679
Signed-off-by: Chris Kay <chris.kay@arm.com>
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| ba39362f | 09-Dec-2020 |
Chris Kay <chris.kay@arm.com> |
build(hooks): add Husky configuration
Husky is a tool for managing Git hooks within the repository itself.
Traditionally, commit hooks need to be manually installed on a per-user
basis, but Husky al
build(hooks): add Husky configuration
Husky is a tool for managing Git hooks within the repository itself.
Traditionally, commit hooks need to be manually installed on a per-user
basis, but Husky allows us to install these hooks either automatically
when `npm install` is invoked within the repository, or manually with
`npx husky install`.
This will become useful for us in the next few patches when we begin
introducing tools for enforcing a commit message style.
Change-Id: I64cae147e9ea910347416cfe0bcc4652ec9b4830
Signed-off-by: Chris Kay <chris.kay@arm.com>
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| 641c5ff6 | 14-Apr-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs: Update Mbed TLS supported version
Updated the documentation with latest Mbed TLS supported
version i.e. Mbed TLS v2.26.0
Fixes available in this version of Mbed TLS mainly affect
key generati
docs: Update Mbed TLS supported version
Updated the documentation with latest Mbed TLS supported
version i.e. Mbed TLS v2.26.0
Fixes available in this version of Mbed TLS mainly affect
key generation/writing and certificates writing, which
are features used in the cert_create tool.
Release notes of Mbed TLSv2.26.0 are available here:
https://github.com/ARMmbed/mbedtls/releases/tag/v2.26.0
Change-Id: Ie15ee45d878b7681e15ec4bf64d54b416a31aa2f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 511c7f3a | 13-Apr-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "dcc_console" into integration
* changes:
plat:xilinx:versal: Add JTAG DCC support
plat:xilinx:zynqmp: Add JTAG DCC support
drivers: dcc: Support JTAG DCC console |
| 4fe571b8 | 08-Apr-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware
CZ.NIC as part of Turris project released free and open source WTMI
application firmware 'wtmi_app.bin' for all Armada 3720 de
docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware
CZ.NIC as part of Turris project released free and open source WTMI
application firmware 'wtmi_app.bin' for all Armada 3720 devices. This
firmware includes additional features like access to Hardware Random
Number Generator of Armada 3720 SoC which original Marvell's 'fuse.bin'
image does not have.
CZ.NIC's Armada 3720 Secure Firmware is available at website:
https://gitlab.nic.cz/turris/mox-boot-builder/
This change updates documentation to include steps how to build Marvell
firmware image for Espressobin with this firmware to enable Hardware
Random Number Generator on Espressobin.
In this change is fixed also URL to TF-A and U-Boot git repositories in
Espressobin build example. And as Marvell github repositories switched
default branch to master, explicit branch via -b parameter is redundant
and therefore from examples removed.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I59ee29cb6ed149264c5e4202f2af8f9ab3859418
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| a492edc4 | 23-Mar-2021 |
laurenw-arm <lauren.wehrmeister@arm.com> |
lib/cpu: Workaround for Cortex A77 erratum 1946167
Cortex A77 erratum 1946167 is a Cat B erratum that applies to revisions
<= r1p1. This erratum is avoided by inserting a DMB ST before acquire
atomi
lib/cpu: Workaround for Cortex A77 erratum 1946167
Cortex A77 erratum 1946167 is a Cat B erratum that applies to revisions
<= r1p1. This erratum is avoided by inserting a DMB ST before acquire
atomic instructions without release semantics through a series of
writes to implementation defined system registers.
SDEN can be found here:
https://documentation-service.arm.com/static/600057a29b9c2d1bb22cd1be?token=
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I53e3b4fb7e7575ec83d75c2f132eda5ae0b4f01f
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| 0b25f404 | 27-Nov-2020 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
plat:xilinx:versal: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Mic
plat:xilinx:versal: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Change-Id: I77994ce387caf0d695986df3d01d414a920978d0
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