| 76a21174 | 12-Feb-2021 |
Mikael Olsson <mikael.olsson@arm.com> |
Add SiP service to configure Arm Ethos-N NPU
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode the non-secure world cannot access the registers needed to use the NPU. To still
Add SiP service to configure Arm Ethos-N NPU
By default the Arm Ethos-N NPU will boot up in secure mode. In this mode the non-secure world cannot access the registers needed to use the NPU. To still allow the non-secure world to use the NPU, a SiP service has been added that can delegate non-secure access to the registers needed to use it.
Only the HW_CONFIG for the Arm Juno platform has been updated to include the device tree for the NPU and the platform currently only loads the HW_CONFIG in AArch64 builds.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I65dfd864042ed43faae0a259dcf319cbadb5f3d2
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| a9e14e20 | 20-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware" into integration |
| 718dbcac | 12-Oct-2020 |
Konstantin Porotchkin <kostap@marvell.com> |
plat/marvell/armada: allow builds without MSS support
Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2 definition. Images build with MSS_SUPPORT=0 will not include service CPUs FW and w
plat/marvell/armada: allow builds without MSS support
Setting MSS_SUPPORT to 0 also removes requirement for SCP_BL2 definition. Images build with MSS_SUPPORT=0 will not include service CPUs FW and will not support PM, FC and other features implemented in these FW images.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Change-Id: Idf301ebd218ce65a60f277f3876d0aeb6c72f105 Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/37769 Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com> Reviewed-by: Stefan Chulski <stefanc@marvell.com> Reviewed-by: Ofer Heifetz <oferh@marvell.com> Reviewed-by: Nadav Haklai <nadavh@marvell.com>
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| 4fe571b8 | 08-Apr-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware
CZ.NIC as part of Turris project released free and open source WTMI application firmware 'wtmi_app.bin' for all Armada 3720 de
docs: marvell: Add information about CZ.NIC Armada 3720 Secure Firmware
CZ.NIC as part of Turris project released free and open source WTMI application firmware 'wtmi_app.bin' for all Armada 3720 devices. This firmware includes additional features like access to Hardware Random Number Generator of Armada 3720 SoC which original Marvell's 'fuse.bin' image does not have.
CZ.NIC's Armada 3720 Secure Firmware is available at website:
https://gitlab.nic.cz/turris/mox-boot-builder/
This change updates documentation to include steps how to build Marvell firmware image for Espressobin with this firmware to enable Hardware Random Number Generator on Espressobin.
In this change is fixed also URL to TF-A and U-Boot git repositories in Espressobin build example. And as Marvell github repositories switched default branch to master, explicit branch via -b parameter is redundant and therefore from examples removed.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I59ee29cb6ed149264c5e4202f2af8f9ab3859418
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| 0b25f404 | 27-Nov-2020 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
plat:xilinx:versal: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Mic
plat:xilinx:versal: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I77994ce387caf0d695986df3d01d414a920978d0
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| c00baeec | 27-Nov-2020 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
plat:xilinx:zynqmp: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Mic
plat:xilinx:zynqmp: Add JTAG DCC support
As per the new multi-console framework, updating the JTAG DCC support.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I62cfbb57ae7e454fbc91d1c54aafa6e99f9a35c8
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| 26123ca3 | 28-Nov-2020 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Add Allwinner H616 SoC support
The new Allwinner H616 SoC lacks the management controller and the secure SRAM A2, so we need to tweak the memory map quite substantially: We run BL31 in DR
allwinner: Add Allwinner H616 SoC support
The new Allwinner H616 SoC lacks the management controller and the secure SRAM A2, so we need to tweak the memory map quite substantially: We run BL31 in DRAM. Since the DRAM starts at 1GB, we cannot use our compressed virtual address space (max 256MB) anymore, so we revert to the full 32bit VA space and use a flat mapping throughout all of it.
The missing controller also means we need to always use the native PSCI ops, using the CPUIDLE hardware, as SCPI and suspend depend on the ARISC.
Change-Id: I77169b452cb7f5dc2ef734f3fc6e5d931749141d Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| fe90f9ae | 11-Dec-2020 |
Andre Przywara <andre.przywara@arm.com> |
doc: allwinner: Reorder sections, document memory mapping
Update the Allwinner platform documentation. Reorder the section, to have the build instructions first, followed by hints about the installa
doc: allwinner: Reorder sections, document memory mapping
Update the Allwinner platform documentation. Reorder the section, to have the build instructions first, followed by hints about the installation.
Add some ASCII art about the layout of our virtual memory map, which uses a non-trivial condensed virtual address space.
Change-Id: Iaaa79b4366012394e15e4c1b26c212b5efb6ed6a Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| ad329e50 | 21-Dec-2020 |
Ying-Chun Liu (PaulLiu) <paulliu@debian.org> |
plat: imx8mm: Add in BL2 with FIP
Adds bl2 with FIP to the build required for mbed Linux booting where we do:
BootROM -> SPL -> BL2 -> OPTEE -> u-boot
If NEED_BL2 is specified then BL2 will be bui
plat: imx8mm: Add in BL2 with FIP
Adds bl2 with FIP to the build required for mbed Linux booting where we do:
BootROM -> SPL -> BL2 -> OPTEE -> u-boot
If NEED_BL2 is specified then BL2 will be built and BL31 will have its address range modified upwards to accommodate. BL31 must be loaded from a FIP in this case.
If NEED_BL2 is not specified then the current BL31 boot flow is unaffected and u-boot SPL will load and execute BL31 directly.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org> Change-Id: I655343b3b689b1fc57cfbedda4d3dc2fbd549a96
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| 051906bb | 01-Mar-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs: Add GIC600AE FVP model version information
Added GIC600AE FVP model version information.
Change-Id: I15d25fbdb8e09900976d5993032ec049f8db79f2 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe
docs: Add GIC600AE FVP model version information
Added GIC600AE FVP model version information.
Change-Id: I15d25fbdb8e09900976d5993032ec049f8db79f2 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| f1127926 | 15-Feb-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
docs: stm32mp1: correct formatting issues
Add blank lines before lists and code example.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I901646e0be74227af983079d0cbe05c6a217fab6 |
| d30a6615 | 24-Jan-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
doc: Build option to protect GICR frame
Added a build option 'FVP_GICR_REGION_PROTECTION' to make redistributor frame of fused/unused cores as read only.
Change-Id: Ie85f86e2465b93321a92a888ce8712a
doc: Build option to protect GICR frame
Added a build option 'FVP_GICR_REGION_PROTECTION' to make redistributor frame of fused/unused cores as read only.
Change-Id: Ie85f86e2465b93321a92a888ce8712a3144e4ccb Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 477e28de | 02-Feb-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "marvell-armada-docs" into integration
* changes: docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell fi
Merge changes from topic "marvell-armada-docs" into integration
* changes: docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image docs: marvell: Fix description of flash-image.bin image docs: marvell: Add information into CLOCKSPRESET option how to identify CPU frequency docs: marvell: Reformat DDR_TOPOLOGY option and mention EspressoBin-Ultra board docs: marvell: Move Supported Marvell platforms to PLAT build option
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| 6803d989 | 02-Feb-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "marvell-a3k-separate-flash-and-uart" into integration
* changes: plat: marvell: armada: a3k: Do not use 'echo -e' in Makefile docs: marvell: Update info about BOOTDEV=S
Merge changes from topic "marvell-a3k-separate-flash-and-uart" into integration
* changes: plat: marvell: armada: a3k: Do not use 'echo -e' in Makefile docs: marvell: Update info about BOOTDEV=SATA
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| 72645d5b | 02-Feb-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "marvell-a3k-separate-flash-and-uart" into integration
* changes: docs: marvell: Update info about WTMI_IMG option plat: marvell: armada: a3k: Remove unused variable WTM
Merge changes from topic "marvell-a3k-separate-flash-and-uart" into integration
* changes: docs: marvell: Update info about WTMI_IMG option plat: marvell: armada: a3k: Remove unused variable WTMI_SYSINIT_IMG from Makefile plat: marvell: armada: Show informative build messages and blank lines plat: marvell: armada: Move definition of mrvl_flash target to common marvell_common.mk file plat: marvell: armada: a3k: Use $(Q) instead of @ plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image plat: marvell: armada: a3k: Build UART image files directly in $(BUILD_UART) subdirectory plat: marvell: armada: a3k: Build intermediate files in $(BUILD_PLAT) directory plat: marvell: armada: a3k: Correctly set DDR_TOPOLOGY and CLOCKSPRESET for WTMI plat: marvell: armada: a3k: Allow use of the system Crypto++ library docs: marvell: Update info about WTP and MV_DDR_PATH parameters plat: marvell: armada: a3k: Add checks that WTP, MV_DDR_PATH and CRYPTOPP_PATH are correctly defined docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches
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| ff46a41d | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image
ESPRESSObin-Ultra TF-A build example was now just a copy+paste o
docs: marvell: Replace ESPRESSObin-Ultra TF-A build example by full example how to build production release of Marvell firmware image
ESPRESSObin-Ultra TF-A build example was now just a copy+paste of previous mentioned example. It produced debug binary with custom log level, which was not described. So rather replace this duplicate build example by a full example with all steps how to build production release of Marvell firmware image for EspressoBin with 1GHz CPU and 1GB DDR4 RAM.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ief1b8bc96a3035ebd8421bd68dca5eb5c8d8fd52
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| f60f1e84 | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Fix description of flash-image.bin image
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I192acab2a7f42cd80069faeac2d7823a05558dc6 |
| 23abf07c | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Add information into CLOCKSPRESET option how to identify CPU frequency
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1 |
| 9c3fffdc | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Reformat DDR_TOPOLOGY option and mention EspressoBin-Ultra board
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a |
| 24e6e10b | 01-Feb-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Move Supported Marvell platforms to PLAT build option
Reformat list of boards, remove unsupported OcteonTX2 and mention supported Turris MOX board.
Signed-off-by: Pali Rohár <pali@ke
docs: marvell: Move Supported Marvell platforms to PLAT build option
Reformat list of boards, remove unsupported OcteonTX2 and mention supported Turris MOX board.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563
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| 711a6bb7 | 27-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about WTMI_IMG option
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may be misleading as this option does not specify full WTMI image, just a main
docs: marvell: Update info about WTMI_IMG option
Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may be misleading as this option does not specify full WTMI image, just a main loop (e.g. fuse.bin or custom RTOS image) without hardware initialization code (DDR, CPU and clocks).
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I3de4a27ce2165b962fa628c992fd8f80151efd7c
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| 33af2937 | 28-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about BOOTDEV=SATA
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id:
docs: marvell: Update info about BOOTDEV=SATA
Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I5f608e135ec56685a3e2b986a52670540d48a4bf
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| 8b920973 | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image
This change separates building of flash and UART images, so it is possible to build only one of these images. Also this
plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image
This change separates building of flash and UART images, so it is possible to build only one of these images. Also this change allows make to build them in parallel.
Target mrvl_flash now builds only flash image and mrvl_uart only UART image. This change reflects it also in the documentation.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3
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| 8708a884 | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
plat: marvell: armada: a3k: Allow use of the system Crypto++ library
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory path
plat: marvell: armada: a3k: Allow use of the system Crypto++ library
This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and CRYPTOPP_INCDIR, which can be used to specify directory paths to pre-compiled Crypto++ library and header files.
When both new parameters are specified then the source code of Crypto++ via CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build process to use system Crypto++ library.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b
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| 494be3ee | 26-Jan-2021 |
Pali Rohár <pali@kernel.org> |
docs: marvell: Update info about WTP and MV_DDR_PATH parameters
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: Id5e36b7ba3a840cb3598c580e806b52d8e8dd70f |