feat(bl2): support RESET_TO_BL2 and ENABLE_RME

When RSE is used as the root of trust along with CPU that supports RME
there is a need to enable both RESET_TO_BL2 and ENABLE_RME.

In current bl2_main

feat(bl2): support RESET_TO_BL2 and ENABLE_RME

When RSE is used as the root of trust along with CPU that supports RME
there is a need to enable both RESET_TO_BL2 and ENABLE_RME.

In current bl2_main there are two different code paths for RESET_BL2,
one handles BL2 running in EL1 and other for BL2 running in EL3.

When RME is enabled, BL2 always runs at EL3 but the current flow calls
bl2_early_platform_setup2, bl2_plat_arch_setup instead of
bl2_el3_early_platform_setup, bl2_el3_plat_arch_setup. Adding RME,
TRANSFER_LIST, ROMLIB support in bl2_el3_* helpers makes
arm_bl2_el3_setup.c almost identical to arm_bl2_setup.c.

This patch removes bl2_el3_plat helpers and related files. Now different
combinations of RESET_TO_BL2, ENABLE_RME are handled in common bl2_setup
routines in arm_bl2_setup.c. This helps to have common place to support
new features and build flags for BL2 irrespective of which EL the BL2
runs.

BREAKING-CHANGE: This patch also changes all existing platform files and
functions that use format bl2_el3_* to bl2_plat helpers. If any platform
or out-of-tree platforms that need to support running BL2 in EL1 or EL3
must now handle it in bl2_early_platform_setup2 and bl2_plat_arch_setup.

Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I8d332dbe2de1db3b69319496c8d04626cdcf4140

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fix(fvp): fully remove FVP_Foundation

It was removed with patch 4f6c9397b61824b320f7b16b6267d9928dc88998 but
some bits remain. Remove them.

Change-Id: Ia40d97ca81983006e470b061d913d238cf73b6f9
Sign

fix(fvp): fully remove FVP_Foundation

It was removed with patch 4f6c9397b61824b320f7b16b6267d9928dc88998 but
some bits remain. Remove them.

Change-Id: Ia40d97ca81983006e470b061d913d238cf73b6f9
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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docs(arm): document BL2 mem params override

Add documentation for the ARM_PLAT_PROVIDES_BL2_MEM_PARAMS flag,
which allows platforms to supply their own
bl2_mem_params_desc.c implementation instead o

docs(arm): document BL2 mem params override

Add documentation for the ARM_PLAT_PROVIDES_BL2_MEM_PARAMS flag,
which allows platforms to supply their own
bl2_mem_params_desc.c implementation instead of using the common
Arm platform implementation.

Change-Id: I1eb8d262ba404f10a3cc2a0ff23bbc3f70041115
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>

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docs(rdaspen): measured boot support

Add optional measured boot support for RDaspen platform to enable
image and data measurement.

Change-Id: I49097cc1bbbda3c96a6ca22f1e7e76087b3ee856
Signed-off-by

docs(rdaspen): measured boot support

Add optional measured boot support for RDaspen platform to enable
image and data measurement.

Change-Id: I49097cc1bbbda3c96a6ca22f1e7e76087b3ee856
Signed-off-by: Maximilian Berndt <maximilian.berndt@arm.com>

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Merge changes from topic "qti-rb3gen2" into integration

* changes:
docs(maintainers): update QTI platform maintainers
docs(qti): add RB3Gen2 platform documentation
docs(qti): move documentatio

Merge changes from topic "qti-rb3gen2" into integration

* changes:
docs(maintainers): update QTI platform maintainers
docs(qti): add RB3Gen2 platform documentation
docs(qti): move documentation under docs/plat/qti/
feat(kodiak): add support for RB3Gen2 platform
feat(qti): introduce basic XPU driver
refactor(qti): introduce SoC codename as Kodiak
feat(qti): add TF-A BL2 common platform framework
refactor(qti): refactor RNG as a proper driver
fix(qti): fix config PLAT_XLAT_TABLES_DYNAMIC
feat(qti): add BL32 support
refactor(qti): make UART config independent
refactor(qti): make CNTFRQ config independent
fix(qti): fix build without coreboot

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docs: deprecate Arm RD1AE platform

RD1AE (Kronos) is now deprecated in TF-A v2.14. Emit a build-time
warning in platform.mk of that platform to make the status explicit.
Update docs/plat/index.rst t

docs: deprecate Arm RD1AE platform

RD1AE (Kronos) is now deprecated in TF-A v2.14. Emit a build-time
warning in platform.mk of that platform to make the status explicit.
Update docs/plat/index.rst to list RD1AE with deleted version set to
TBD.
Drop from the deprecated table platforms that were already deleted in
v2.13 (TC2, fvp_r, SGI-575, RD-N1-Edge, RD-V1, RD-V1-MC).

Change-Id: Ia334a1901fbf303e876e85c8075e2ac7e3fa0d67
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs(rdaspen): bl32 and GPT support

Added optional BL32 support for the RDaspen platform to enable
Trusted OS integration when required.

Updated documentation to clarify that if BL32 is not set, BL

docs(rdaspen): bl32 and GPT support

Added optional BL32 support for the RDaspen platform to enable
Trusted OS integration when required.

Updated documentation to clarify that if BL32 is not set, BL33 will
load directly after BL31.

Revised the ARM_GPT_SUPPORT description to note that it must be
enabled when the FIP image resides in a GPT partition on Secure Flash.

Change-Id: I79905efd026994290d0bc6c07cdf1f5a903c9194
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>

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docs(qti): add RB3Gen2 platform documentation

Add documentation for RB3Gen2 platform listing down step to build, flash
and boot up the platform with TF-A BL2 and BL31 support.

Change-Id: I361fec8fb

docs(qti): add RB3Gen2 platform documentation

Add documentation for RB3Gen2 platform listing down step to build, flash
and boot up the platform with TF-A BL2 and BL31 support.

Change-Id: I361fec8fb7a98b92fed3b1000f6f0c6f510c4887
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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docs(qti): move documentation under docs/plat/qti/

Move documentation under docs/plat/qti/ to become a consolidated place
for QTI platforms documentation.

Change-Id: Ief6f1f811de504761f00ce1acbd608

docs(qti): move documentation under docs/plat/qti/

Move documentation under docs/plat/qti/ to become a consolidated place
for QTI platforms documentation.

Change-Id: Ief6f1f811de504761f00ce1acbd608663eee344f
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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refactor(qti): introduce SoC codename as Kodiak

Qualcomm has recently started using SoC codenames for upstream support
with Linux kernel being the first adoptor. Using SoC codenames for
upstream pro

refactor(qti): introduce SoC codename as Kodiak

Qualcomm has recently started using SoC codenames for upstream support
with Linux kernel being the first adoptor. Using SoC codenames for
upstream projects removes the need to follow different product names
like for kodiak which is also known as sc7280, qcm6490 etc.

Let's follow this practice of using SoC codenames for TF-A project too
beginning with Kodiak. While doing that let's refactor SoC and board
specific files where the existing support for sc7280 has been renamed to
sc7280_chrome to reflect it's usage.

Change-Id: I236fadf8ae9550f94deb05ebfed17e2ddbd69509
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>

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fix(docs): fix some broken links

Fix few broken links from docs.

Link check was done with following steps -

[..]
tf-a/docs$ make clean -j8; poetry run make html -j8
tf-a/docs$ poetry run sphinx-bu

fix(docs): fix some broken links

Fix few broken links from docs.

Link check was done with following steps -

[..]
tf-a/docs$ make clean -j8; poetry run make html -j8
tf-a/docs$ poetry run sphinx-build -j8 -q -b linkcheck . build/
[..]

Add link check conf values to config.py
- avoid reporting false broken links when `#`(anchors) are present
in the link.
- avoid checking for broken links in "change-log.md", this is summary
of commit msg's we are not going to fix broken links in cmt-msg's

Change-Id: I384094c8dcf3e93875c9052afa79ad826b9901d9
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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docs(rdaspen): introduce rdaspen docs

RD-Aspen platform is formally introduced into the
documentation.

Refactors RD platforms separately, and a generic
Automotive RD index doc file is created.

Mai

docs(rdaspen): introduce rdaspen docs

RD-Aspen platform is formally introduced into the
documentation.

Refactors RD platforms separately, and a generic
Automotive RD index doc file is created.

Maintainers list updated for platform maintainer
of rdaspen.

Change-Id: I289a8caaa6f0e34e953f4101ee2814f1500bc9c8
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>

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Merge "docs(tegra): add note that clang is not supported" into integration

docs(tegra): add note that clang is not supported

This has never worked. Since the general docs indicate that clang is
supported, the Tegra docs should explicitly state that it is not
supported.

Ch

docs(tegra): add note that clang is not supported

This has never worked. Since the general docs indicate that clang is
supported, the Tegra docs should explicitly state that it is not
supported.

Change-Id: I07654e02717a1a53a5d64088f4a79b034030bf26
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>

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feat(arm): unify Linux kernel as BL33 handling

Streamlines and unifies how Arm platforms pass arguments to the Linux
kernel when it is loaded as BL33. It replaces the FVP specific macro
`FVP_HW_CONF

feat(arm): unify Linux kernel as BL33 handling

Streamlines and unifies how Arm platforms pass arguments to the Linux
kernel when it is loaded as BL33. It replaces the FVP specific macro
`FVP_HW_CONFIG_ADDR` with a common macro `ARM_HW_CONFIG_ADDR` for
accessing the device tree blob base address.

For FVP the DT address is set to use `ARM_PRELOADED_DTB_BASE` if
provided, falling back to a default address otherwise.

This provides a consistent mechanism for Arm platforms to define and
override the DTB base address used during kernel handoff. It reduces the
chance of misconfiguration, and simplifies platform integration.

Change-Id: Ib668dbb1de9d42cf41c0b0ee9a316f054891752a
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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docs(s32g274a): update compilation instructions

Changes to the Poetry memory module have removed
support for the `-f` option, following commit
8daebefe59e ("refactor(memmap)!: change behavioural fla

docs(s32g274a): update compilation instructions

Changes to the Poetry memory module have removed
support for the `-f` option, following commit
8daebefe59e ("refactor(memmap)!: change behavioural flags to commands").

This update replaces `-f` with `footprint` option
to ensure compatibility with the updated memory
module.

Change-Id: I58eb2c5e9ca649c7a00696b0a3b5c8e02fa29c84
Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@nxp.com>

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Merge changes from topics "amd_scmi_in_nopm", "amd_versal2_custom_sip" into integration

* changes:
feat(versal2): add hooks for mmap and early setup
refactor(versal2): add tfa_no_pm flag for scmi

Merge changes from topic "bk/gicv5_full" into integration

* changes:
feat(fvp): add a GICv5 device tree
refactor(fvp): factor out interrupt information from the dts

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory m

feat(versal2): add hooks for mmap and early setup

Add early setup hooks through custom_early_setup() and provide a
mechanism to support custom memory mapping, including the extension
of the memory map via custom_mmap_add(). This change may also
require alignment of the MAX_XLAT_TABLE and MAX_XLAT_TABLES macros.
These can be defined within the custom_pkg.mk makefile as follows:

MAX_MMAP_REGIONS := XY
$(eval $(call add_define,MAX_MMAP_REGIONS))
MAX_XLAT_TABLES := XZ
$(eval $(call add_define,MAX_XLAT_TABLES))

If PLATFORM_STACK_SIZE is not already defined, a default value
should be used. This allows for configurability of the stack size
across different interfaces, such as custom packages. The
custom_early_setup() function enables early low-level operations
to bring the system into a correct state. Support for a custom
SiP service is also added. A basic implementation of
custom_smc_handler() is provided by the platform, while the actual
definition is expected to be supplied by the custom package. This
feature is designed for use by external libraries, such as those
that require status checking. This code introduces a generic
framework for integrating custom logic via the
$(CUSTOM_PKG_PATH)/custom_pkg.mk makefile, including
optional support for custom SMC functionality, which is determined
by the custom package.

Change-Id: I40281acf2dc48be43471b8642e2ab1a93b1cf8f6
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sasc

feat(fvp): add a GICv5 device tree

Tested with Linux v6.17-rc1, it boots as long as cpu idle is disabled.

Change-Id: Iadeb157e9d911c4228dc62c5610676f4c07f6c11
Co-developed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Co-developed-by: Lorenzo Pieralisi <lorenzo.pieralisi2@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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docs(versal): update custom SIP service

Correct the platform-specific custom SiP service doc
VERSAL_SIP_SVC_CUSTOM to use the common SOC_SIP_SVC_CUSTOM.

Change-Id: Iab75295432aec1329d3aa69f30897c8a

docs(versal): update custom SIP service

Correct the platform-specific custom SiP service doc
VERSAL_SIP_SVC_CUSTOM to use the common SOC_SIP_SVC_CUSTOM.

Change-Id: Iab75295432aec1329d3aa69f30897c8aaa5a7b9e
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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docs(fvp): add GICv5 build instructions and limitations

Add documentation for enabling GICv5 support in the FVP platform,
including required build options and guidance on usage. Also document
curren

docs(fvp): add GICv5 build instructions and limitations

Add documentation for enabling GICv5 support in the FVP platform,
including required build options and guidance on usage. Also document
current limitations and known constraints.

Introduce build-time checks to ensure incompatible configurations
(e.g., with SPMD or RMMD) fail early with a clear error message.

Initial GICv5 support in FVP is intended to facilitate early Linux
kernel bring-up and to assist with upstream kernel patch development.

Note: This patch is a temporary measure and should be reverted once
proper and complete GICv5 support is upstreamed in TF-A.

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: I2af839aec600040dfde75d74d02eff5a57ecda4e

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feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5

feat(fvp): add GICv5 support

Factors out GICv3 specific code and replace it with GICv5. This can be
selected with FVP_USE_GIC_DRIVER=FVP_GICV5. Specifically, the FCONF
logic does not apply to GICv5 as the bindings are completely different.

This patch does not include a device tree. This will be added at a later
date.

Change-Id: Ifd0c7b4e0bc2ea1e53a6779ab4c50c4aec39dafb
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge changes If4cd4e71,I0b5158ef into integration

* changes:
docs(fvp): add FVP_HW_CONFIG_ADDR documentation
feat(fvp): add FVP_HW_CONFIG_ADDR make variable

docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-

docs(fvp): add FVP_HW_CONFIG_ADDR documentation

Add documentation to describe FVP_HW_CONFIG_ADDR, its default, and its
intended use.

Change-Id: If4cd4e712aa914fee1aeab2fa9fbe682f180b956
Signed-off-by: emily.boarer@arm.com

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