1TF-A Build Instructions for Marvell Platforms 2============================================= 3 4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms. 5 6Build Instructions 7------------------ 8(1) Set the cross compiler 9 10 .. code:: shell 11 12 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu- 13 14(2) Set path for FIP images: 15 16Set U-Boot image path (relatively to TF-A root or absolute path) 17 18 .. code:: shell 19 20 > export BL33=path/to/u-boot.bin 21 22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``, 23BL33 should be ``~/project/u-boot/u-boot.bin`` 24 25 .. note:: 26 27 *u-boot.bin* should be used and not *u-boot-spl.bin* 28 29Set MSS/SCP image path (mandatory only for A7K/8K/CN913x) 30 31 .. code:: shell 32 33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img 34 35(3) Armada-37x0 build requires WTP tools installation. 36 37See below in the section "Tools and external components installation". 38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3 39 40 .. code:: shell 41 42 > sudo apt-get install gcc-arm-linux-gnueabi 43 44(4) Clean previous build residuals (if any) 45 46 .. code:: shell 47 48 > make distclean 49 50(5) Build TF-A 51 52There are several build options: 53 54- PLAT 55 56 Supported Marvell platforms are: 57 58 - a3700 - A3720 DB, EspressoBin and Turris MOX 59 - a70x0 60 - a70x0_amc - AMC board 61 - a80x0 62 - a80x0_mcbin - MacchiatoBin 63 - a80x0_puzzle - IEI Puzzle-M801 64 - t9130 - CN913x 65 66- DEBUG 67 68 Default is without debug information (=0). in order to enable it use ``DEBUG=1``. 69 Must be disabled when building UART recovery images due to current console driver 70 implementation that is not compatible with Xmodem protocol used for boot image download. 71 72- LOG_LEVEL 73 74 Defines the level of logging which will be purged to the default output port. 75 76 - 0 - LOG_LEVEL_NONE 77 - 10 - LOG_LEVEL_ERROR 78 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0) 79 - 30 - LOG_LEVEL_WARNING 80 - 40 - LOG_LEVEL_INFO (default for DEBUG=1) 81 - 50 - LOG_LEVEL_VERBOSE 82 83- USE_COHERENT_MEM 84 85 This flag determines whether to include the coherent memory region in the 86 BL memory map or not. Enabled by default. 87 88- LLC_ENABLE 89 90 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``). 91 92- LLC_SRAM 93 94 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used 95 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows 96 for SRAM address range at BL31 execution stage with window target set to DRAM-0. 97 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM. 98 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n. 99 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y. 100 101- CM3_SYSTEM_RESET 102 103 For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will 104 be used for system reset. 105 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the 106 Cortex-M3 secure coprocessor. 107 The firmware running in the coprocessor must either implement this functionality or 108 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell 109 repository). If this option is enabled but the firmware does not support this command, 110 an error message will be printed prior trying to reboot via the usual way. 111 112 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to 113 sometime hang the board. 114 115- MARVELL_SECURE_BOOT 116 117 Build trusted(=1)/non trusted(=0) image, default is non trusted. 118 119- BLE_PATH 120 121 Points to BLE (Binary ROM extension) sources folder. 122 Only required for A7K/8K/CN913x builds. 123 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``. 124 125- MV_DDR_PATH 126 127 For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0, 128 it is used for ddr_tool build. 129 130 Usage example: MV_DDR_PATH=path/to/mv_ddr 131 132 The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr 133 sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter 134 is necessary for A37x0. 135 136 For the mv_ddr source location, check the section "Tools and external components installation" 137 138- CP_NUM 139 140 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted, 141 the build uses the default number of CPs, which is a number of embedded CPs inside the 142 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC 143 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid 144 values with CP_NUM are in a range of 1 to 3. 145 146- DDR_TOPOLOGY 147 148 For Armada37x0 only, the DDR topology map index/name, default is 0. 149 150 Supported Options: 151 - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 152 - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular) 153 - 2 - DDR3 2CS 1GB (EspressoBin V3-V5) 154 - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular) 155 - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5) 156 - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra) 157 - 6 - DDR4 2CS 2GB (EspressoBin V7) 158 - 7 - DDR3 2CS 2GB (EspressoBin V3-V5) 159 - CUST - CUSTOMER BOARD (Customer board settings) 160 161- CLOCKSPRESET 162 163 For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency, 164 default is CPU_800_DDR_800. 165 166 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz 167 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz 168 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz 169 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz 170 171 Look at Armada37x0 chip package marking on board to identify correct CPU frequency. 172 The last line on package marking (next line after the 88F37x0 line) should contain: 173 174 - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800`` 175 - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800`` 176 - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750`` 177 178- BOOTDEV 179 180 For Armada37x0 only, the flash boot device, default is ``SPINOR``. 181 182 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``: 183 184 - SPINOR - SPI NOR flash boot 185 - SPINAND - SPI NAND flash boot 186 - EMMCNORM - eMMC Download Mode 187 188 Download boot loader or program code from eMMC flash into CM3 or CA53 189 Requires full initialization and command sequence 190 191 - SATA - SATA device boot 192 193- PARTNUM 194 195 For Armada37x0 only, the boot partition number, default is 0. 196 197 To boot from eMMC, the value should be aligned with the parameter in 198 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is 199 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot 200 build instructions. 201 202- WTMI_IMG 203 204 For Armada37x0 only, the path of the WTMI image can point to an image which 205 does nothing, an image which supports EFUSE or a customized CM3 firmware 206 binary. The default image is wtmi.bin that built from sources in WTP 207 folder, which is the next option. If the default image is OK, then this 208 option should be skipped. 209 210- WTP 211 212 For Armada37x0 only, use this parameter to point to wtptools source code 213 directory, which can be found as a3700_utils.zip in the release. Usage 214 example: ``WTP=/path/to/a3700_utils`` 215 216- CRYPTOPP_PATH 217 218 For Armada37x0 only, use this parameter tp point to Crypto++ source code 219 directory, which is required for building WTP image tool. 220 221 222For example, in order to build the image in debug mode with log level up to 'notice' level run 223 224.. code:: shell 225 226 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash 227 228And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level, 229the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS, 230the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command 231line is as following 232 233.. code:: shell 234 235 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \ 236 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 237 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 238 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 239 all fip mrvl_bootimage mrvl_flash 240 241To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command: 242 243.. code:: shell 244 245 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \ 246 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage 247 248You can build TF-A for the Globalscale ESPRESSObin-Ultra board (DDR4, 1 GB) by running the following command: 249 250.. code:: shell 251 252 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1200_DDR_750 \ 253 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=5 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \ 254 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \ 255 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \ 256 all fip mrvl_bootimage mrvl_flash 257 258Special Build Flags 259-------------------- 260 261- PLAT_RECOVERY_IMAGE_ENABLE 262 When set this option to enable secondary recovery function when build atf. 263 In order to build UART recovery image this operation should be disabled for 264 A7K/8K/CN913x because of hardware limitation (boot from secondary image 265 can interrupt UART recovery process). This MACRO definition is set in 266 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file. 267 268- DDR32 269 In order to work in 32bit DDR, instead of the default 64bit ECC DDR, 270 this flag should be set to 1. 271 272For more information about build options, please refer to the 273:ref:`Build Options` document. 274 275 276Build output 277------------ 278Marvell's TF-A compilation generates 8 files: 279 280 - ble.bin - BLe image (not available for Armada37x0) 281 - bl1.bin - BL1 image 282 - bl2.bin - BL2 image 283 - bl31.bin - BL31 image 284 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images) 285 - boot-image.bin - TF-A image (contains BL1 and FIP images) 286 - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it 287 contains TIM, WTMI and boot-image.bin images. For other platforms it contains 288 BLe and boot-image.bin images. Should be placed on the boot flash/device. 289 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images 290 for booting via UART. Could be loaded via Marvell's WtpDownload tool from 291 A3700-utils-marvell repository. 292 293Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file and target 294``mrvl_flash`` produce final ``flash-image.bin`` and ``uart-images.tgz.bin`` files. 295 296 297Tools and external components installation 298------------------------------------------ 299 300Armada37x0 Builds require installation of 3 components 301~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 302 303(1) ARM cross compiler capable of building images for the service CPU (CM3). 304 This component is usually included in the Linux host packages. 305 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed 306 using the following command 307 308 .. code:: shell 309 310 > sudo apt-get install gcc-arm-linux-gnueabi 311 312 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be 313 overwritten using the environment variable ``CROSS_CM3``. 314 Example for BASH shell 315 316 .. code:: shell 317 318 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi 319 320(2) DDR initialization library sources (mv_ddr) available at the following repository 321 (use the "mv-ddr-devel" branch): 322 323 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 324 325(3) Armada3700 tools available at the following repository 326 (use the "A3700_utils-armada-18.12-fixed" branch): 327 328 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git 329 330(4) Crypto++ library available at the following repository: 331 332 https://github.com/weidai11/cryptopp.git 333 334Armada70x0 and Armada80x0 Builds require installation of an additional component 335~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 336 337(1) DDR initialization library sources (mv_ddr) available at the following repository 338 (use the "mv-ddr-devel" branch): 339 340 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git 341