| 6594a67e | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: dra7_rng: Factor out dra7_rng_read64()
The core function is a 64bit RNG read. Factor this out into its own function to help with the switch to hw_get_random_bytes().
Signed-off-by: Andrew
drivers: dra7_rng: Factor out dra7_rng_read64()
The core function is a 64bit RNG read. Factor this out into its own function to help with the switch to hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c6712bd0 | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: dra7_rng: Use cpu_spin_lock_xsave helper function
Does the same thing, saves us a line or two.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@lina
drivers: dra7_rng: Use cpu_spin_lock_xsave helper function
Does the same thing, saves us a line or two.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| d11c29c3 | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: dra7_rng: Only fetch RNG base VA once
No reason to do this every time we want to get a random byte. Fetch this once on init and keep it in a static global.
Signed-off-by: Andrew Davis <afd
drivers: dra7_rng: Only fetch RNG base VA once
No reason to do this every time we want to get a random byte. Fetch this once on init and keep it in a static global.
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cb2478ef | 05-Jul-2022 |
Andrew Davis <afd@ti.com> |
drivers: stm32_rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can s
drivers: stm32_rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 23b77ea3 | 05-Jul-2022 |
Andrew Davis <afd@ti.com> |
drivers: smccc_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can
drivers: smccc_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f6406a3c | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: imx_rngb: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can si
drivers: imx_rngb: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6b8ebe45 | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: se050: rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can
drivers: se050: rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e7d4dea3 | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: caam: rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can s
drivers: caam: rng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8af02d37 | 29-Apr-2022 |
Andrew Davis <afd@ti.com> |
drivers: atmel_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can
drivers: atmel_trng: Switch to hw_get_random_bytes()
hw_get_random_byte() is no longer used. The default crypto_rng_read() calls hw_get_random_bytes() now so we do not need to override this and can simply implement just hw_get_random_bytes().
Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 1c81e5f9 | 06-Jul-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_gpio: temporary GPIO configuration for STM32MP13
This temporary change set all configured GPIOs to non-secure state on STM32MP13 platform. This change is needed while we align all com
drivers: stm32_gpio: temporary GPIO configuration for STM32MP13
This temporary change set all configured GPIOs to non-secure state on STM32MP13 platform. This change is needed while we align all components.
Changes I2C driver to assign I2C pins to secure world for STM32MP13.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| f73343d3 | 06-Jul-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: clk: clk-stm32mp13: add ck_mlahb to critical clocks
This clock must remain enabled as long as the platform is running.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Sign
drivers: clk: clk-stm32mp13: add ck_mlahb to critical clocks
This clock must remain enabled as long as the platform is running.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 837adc0a | 28-Jun-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: increase the minimum entropy delay the imx6sx
The i.MX6SX requires to start the RNG instantiation at a higher entropy delay to provide a stable RNG generation and avoid RNG hardware e
drivers: caam: increase the minimum entropy delay the imx6sx
The i.MX6SX requires to start the RNG instantiation at a higher entropy delay to provide a stable RNG generation and avoid RNG hardware errors.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cd451498 | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: implement plat_rng_init()
Moves plat_rng_init() definition from platform source file rng_seed.c to core driver source stm32_rng.c. There is no platform magic needed in this funct
drivers: stm32_rng: implement plat_rng_init()
Moves plat_rng_init() definition from platform source file rng_seed.c to core driver source stm32_rng.c. There is no platform magic needed in this function. As a result, seed_rng.c source file is removed.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 097f329a | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: register as hwrng source
Implements RNG as hardware entropy source when CFG_STM32_RNG is enable and CFG_WITH_SOFTWARE_PRNG is disable.
This is realised by implementing crypto_rn
drivers: stm32_rng: register as hwrng source
Implements RNG as hardware entropy source when CFG_STM32_RNG is enable and CFG_WITH_SOFTWARE_PRNG is disable.
This is realised by implementing crypto_rng_read() and hw_get_random_byte() in driver.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 23123473 | 29-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: helper trace in rng path
Adds helper flow level trace messages in random sample generation sequence.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne
drivers: stm32_rng: helper trace in rng path
Adds helper flow level trace messages in random sample generation sequence.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c99311c8 | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: remove millisecond timeout with interrupts masked
Removes the 10ms timeout monitored waiting loop in stm32_rng_read_raw() that was called with interrupts masked. stm32_rng_read_r
drivers: stm32_rng: remove millisecond timeout with interrupts masked
Removes the 10ms timeout monitored waiting loop in stm32_rng_read_raw() that was called with interrupts masked. stm32_rng_read_raw() is renamed read_available() and does not pool a hardware status: it either returns or reads samples according to RNG state.
Changes stm32_rng_read() to monitor RNG burst generation with a 100ms timeout. This timeout threshold targets that at least few REE ticks (dozen of ms) allow RNG to conceal and synchronize upon bad conditions.
As change rewrites function stm32_rng_read(), it also removes a zeroing of the buffer on sample generation error. The wiping is removed since pointless.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7968bdf6 | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: don't export stm32_rng_read_raw()
No need to export stm32_rng function stm32_rng_read_raw(). It is only called from stm32_rng_read(). Also removes re-enabling of RNG in stm32_rng
drivers: stm32_rng: don't export stm32_rng_read_raw()
No need to export stm32_rng function stm32_rng_read_raw(). It is only called from stm32_rng_read(). Also removes re-enabling of RNG in stm32_rng_read_raw() since already handled by caller function.
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d8682c4c | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: init rng before service initcall level
Initializes stm32_rng driver before service initcall level so that device driver is ready when plat_rng_init() is called.
At this stage, r
drivers: stm32_rng: init rng before service initcall level
Initializes stm32_rng driver before service initcall level so that device driver is ready when plat_rng_init() is called.
At this stage, resource firewall may not be initialized therefore choose to always map RNG IOMEM with secure attribute which conforms to firewall configuration. When RNG is assigned to non-secure, RNG resources are released once boot completes.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| c22a37d3 | 28-Jun-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
drivers: stm32_rng: remove thread exceptions masking under spinlock
Fixes stm32_rng.c to not mask thread exceptions in function stm32_rng_read_raw() that is called with a spinlock held and interrupt
drivers: stm32_rng: remove thread exceptions masking under spinlock
Fixes stm32_rng.c to not mask thread exceptions in function stm32_rng_read_raw() that is called with a spinlock held and interrupts already masked.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 9378f3e6 | 23-Jun-2022 |
Tim Anderson <tim.anderson@foundries.io> |
imx_ocotp: correct ocotp fuse address computation
Not all the imx platforms have the same bank spacing. In particular the imx6 and imx7ulp both have bank sizes that are twice as large as the imx8m.
imx_ocotp: correct ocotp fuse address computation
Not all the imx platforms have the same bank spacing. In particular the imx6 and imx7ulp both have bank sizes that are twice as large as the imx8m.
The ocotp_get_die_id_mx7ulp() function was written with the old computation, so bank 2, work 6 would be 0x4e0 offset. Using the new calc, bank 1, word 6 would be 0x4e0 offset.
So all the bank values should move to bank 1.
This will set the correct computation.
Signed-off-by: Tim Anderson <tim.anderson@foundries.io> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Clement Faure <clement.faure@nxp.com>
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| 3fc5c287 | 13-May-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation
Disable the use of DCP unique key (0xfe in the DCP key selection) after the HUK generation. The DCP unique key is used to genera
drivers: imx: dcp: disable the use of UNIQUE KEY after HUK generation
Disable the use of DCP unique key (0xfe in the DCP key selection) after the HUK generation. The DCP unique key is used to generate the HUK at boot time. Disabling the use of the unique key prevents the non-secure world from re-generating the HUK.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx-mx6ullevk)
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| ebc90499 | 13-May-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx: dcp: clear OTP_KEY bit for unique key selection
The use of the unique key for the HUK generation requires the OTP_KEY bit to be cleared in the DCP control0 bit field.
Signed-off-by: C
drivers: imx: dcp: clear OTP_KEY bit for unique key selection
The use of the unique key for the HUK generation requires the OTP_KEY bit to be cleared in the DCP control0 bit field.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx-mx6ullevk)
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| b6760712 | 02-Mar-2022 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx: dcp: workaround DCP errata 051292
The internal boot ROM should reset the DCP controller prior jumping to bootloader execution. The current boot ROM implementation does not assert a DCP
drivers: imx: dcp: workaround DCP errata 051292
The internal boot ROM should reset the DCP controller prior jumping to bootloader execution. The current boot ROM implementation does not assert a DCP reset.
To mitigate the issue, users can implement a DCP reset by setting SFTRST[31] and CTRL_CLKGATE[30] bits in the DCP_CTRL_SET registers.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Ricardo Salveti <ricardo@foundries.io> (imx-mx6ullevk)
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| bcf9ecad | 31-May-2022 |
Franck LENORMAND <franck.lenormand@nxp.com> |
drivers: imx_snvs: re-work security state for imx8m platforms
The current implementation of snvs_get_security_cfg() for imx8m platforms includes the read of SYS_SECURE_BOOT bit. This fourth bit show
drivers: imx_snvs: re-work security state for imx8m platforms
The current implementation of snvs_get_security_cfg() for imx8m platforms includes the read of SYS_SECURE_BOOT bit. This fourth bit shows if the board boots from internal ROM. This bit will reset to 1 for a board in the field and 0 for a test chip.
The read of this bit is out of scope of the snvs_get_security_cfg() purpose which is to return the system security configuration. The SYS_SECURE_BOOT bit (msb) can be discarded.
Fixes: 5cd93c5a75 (drivers: imx_snvs: fix SNVS security configuration values) Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 1e1e5a4d | 07-Jun-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_shared_io: introduce shared io driver
This commit implements shared registers support, previously handled in core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.
Defaul
drivers: stm32_shared_io: introduce shared io driver
This commit implements shared registers support, previously handled in core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.
Default enable CFG_STM32_SHARED_IO.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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