1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2018-2019, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/clk.h> 8 #include <drivers/clk_dt.h> 9 #include <drivers/stm32_rng.h> 10 #include <io.h> 11 #include <kernel/delay.h> 12 #include <kernel/dt.h> 13 #include <kernel/boot.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <libfdt.h> 17 #include <mm/core_memprot.h> 18 #include <stdbool.h> 19 #include <stm32_util.h> 20 #include <string.h> 21 22 #define DT_RNG_COMPAT "st,stm32-rng" 23 #define RNG_CR 0x00U 24 #define RNG_SR 0x04U 25 #define RNG_DR 0x08U 26 27 #define RNG_CR_RNGEN BIT(2) 28 #define RNG_CR_IE BIT(3) 29 #define RNG_CR_CED BIT(5) 30 31 #define RNG_SR_DRDY BIT(0) 32 #define RNG_SR_CECS BIT(1) 33 #define RNG_SR_SECS BIT(2) 34 #define RNG_SR_CEIS BIT(5) 35 #define RNG_SR_SEIS BIT(6) 36 37 #define RNG_TIMEOUT_US U(100000) 38 39 struct stm32_rng_instance { 40 struct io_pa_va base; 41 struct clk *clock; 42 unsigned int lock; 43 unsigned int refcount; 44 bool release_post_boot; 45 }; 46 47 static struct stm32_rng_instance *stm32_rng; 48 49 /* 50 * Extracts from the STM32 RNG specification: 51 * 52 * When a noise source (or seed) error occurs, the RNG stops generating 53 * random numbers and sets to “1” both SEIS and SECS bits to indicate 54 * that a seed error occurred. (...) 55 56 * The following sequence shall be used to fully recover from a seed 57 * error after the RNG initialization: 58 * 1. Clear the SEIS bit by writing it to “0”. 59 * 2. Read out 12 words from the RNG_DR register, and discard each of 60 * them in order to clean the pipeline. 61 * 3. Confirm that SEIS is still cleared. Random number generation is 62 * back to normal. 63 */ 64 static void conceal_seed_error(vaddr_t rng_base) 65 { 66 if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) { 67 size_t i = 0; 68 69 io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS); 70 71 for (i = 12; i != 0; i--) 72 (void)io_read32(rng_base + RNG_DR); 73 74 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 75 panic("RNG noise"); 76 } 77 } 78 79 #define RNG_FIFO_BYTE_DEPTH 16u 80 81 static TEE_Result read_available(vaddr_t rng_base, uint8_t *out, size_t *size) 82 { 83 uint8_t *buf = NULL; 84 size_t req_size = 0; 85 size_t len = 0; 86 87 conceal_seed_error(rng_base); 88 89 if (!(io_read32(rng_base + RNG_SR) & RNG_SR_DRDY)) { 90 FMSG("RNG not ready"); 91 return TEE_ERROR_NO_DATA; 92 } 93 94 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) { 95 FMSG("RNG noise error"); 96 return TEE_ERROR_NO_DATA; 97 } 98 99 buf = out; 100 req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size); 101 len = req_size; 102 103 /* RNG is ready: read up to 4 32bit words */ 104 while (len) { 105 uint32_t data32 = io_read32(rng_base + RNG_DR); 106 size_t sz = MIN(len, sizeof(uint32_t)); 107 108 memcpy(buf, &data32, sz); 109 buf += sz; 110 len -= sz; 111 } 112 113 *size = req_size; 114 115 return TEE_SUCCESS; 116 } 117 118 static void gate_rng(bool enable, struct stm32_rng_instance *dev) 119 { 120 vaddr_t rng_cr = io_pa_or_va(&dev->base, 1) + RNG_CR; 121 uint32_t exceptions = may_spin_lock(&dev->lock); 122 123 if (enable) { 124 /* incr_refcnt return non zero if resource shall be enabled */ 125 if (incr_refcnt(&dev->refcount)) { 126 FMSG("enable RNG"); 127 clk_enable(dev->clock); 128 io_write32(rng_cr, 0); 129 io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED); 130 } 131 } else { 132 /* decr_refcnt return non zero if resource shall be disabled */ 133 if (decr_refcnt(&dev->refcount)) { 134 FMSG("disable RNG"); 135 io_write32(rng_cr, 0); 136 clk_disable(dev->clock); 137 } 138 } 139 140 may_spin_unlock(&dev->lock, exceptions); 141 } 142 143 TEE_Result stm32_rng_read(uint8_t *out, size_t size) 144 { 145 TEE_Result rc = TEE_ERROR_GENERIC; 146 bool burst_timeout = false; 147 uint64_t timeout_ref = 0; 148 uint32_t exceptions = 0; 149 uint8_t *out_ptr = out; 150 vaddr_t rng_base = 0; 151 size_t out_size = 0; 152 153 if (!stm32_rng) { 154 DMSG("No RNG"); 155 return TEE_ERROR_NOT_SUPPORTED; 156 } 157 158 gate_rng(true, stm32_rng); 159 rng_base = io_pa_or_va(&stm32_rng->base, 1); 160 161 /* Arm timeout */ 162 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 163 burst_timeout = false; 164 165 while (out_size < size) { 166 /* Read by chunks of the size the RNG FIFO depth */ 167 size_t sz = size - out_size; 168 169 exceptions = may_spin_lock(&stm32_rng->lock); 170 171 rc = read_available(rng_base, out_ptr, &sz); 172 173 /* Raise timeout only if we failed to get some samples */ 174 assert(!rc || rc == TEE_ERROR_NO_DATA); 175 if (rc) 176 burst_timeout = timeout_elapsed(timeout_ref); 177 178 may_spin_unlock(&stm32_rng->lock, exceptions); 179 180 if (burst_timeout) { 181 rc = TEE_ERROR_GENERIC; 182 goto out; 183 } 184 185 if (!rc) { 186 out_size += sz; 187 out_ptr += sz; 188 /* Re-arm timeout */ 189 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 190 burst_timeout = false; 191 } 192 } 193 194 out: 195 assert(!rc || rc == TEE_ERROR_GENERIC); 196 gate_rng(false, stm32_rng); 197 198 return rc; 199 } 200 201 #ifdef CFG_EMBED_DTB 202 static TEE_Result stm32_rng_init(void) 203 { 204 void *fdt = NULL; 205 int node = -1; 206 struct dt_node_info dt_info; 207 TEE_Result res = TEE_ERROR_GENERIC; 208 209 memset(&dt_info, 0, sizeof(dt_info)); 210 211 fdt = get_embedded_dt(); 212 if (!fdt) 213 panic(); 214 215 while (true) { 216 node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT); 217 if (node < 0) 218 break; 219 220 _fdt_fill_device_info(fdt, &dt_info, node); 221 222 if (!(dt_info.status & DT_STATUS_OK_SEC)) 223 continue; 224 225 if (stm32_rng) 226 panic(); 227 228 stm32_rng = calloc(1, sizeof(*stm32_rng)); 229 if (!stm32_rng) 230 panic(); 231 232 assert(dt_info.clock != DT_INFO_INVALID_CLOCK && 233 dt_info.reg != DT_INFO_INVALID_REG && 234 dt_info.reg_size != DT_INFO_INVALID_REG_SIZE); 235 236 if (dt_info.status & DT_STATUS_OK_NSEC) { 237 stm32mp_register_non_secure_periph_iomem(dt_info.reg); 238 stm32_rng->release_post_boot = true; 239 } else { 240 stm32mp_register_secure_periph_iomem(dt_info.reg); 241 } 242 243 stm32_rng->base.pa = dt_info.reg; 244 if (!io_pa_or_va_secure(&stm32_rng->base, dt_info.reg_size)) 245 panic(); 246 247 res = clk_dt_get_by_index(fdt, node, 0, &stm32_rng->clock); 248 if (res) 249 return res; 250 251 assert(stm32_rng->clock); 252 253 DMSG("RNG init"); 254 } 255 256 return TEE_SUCCESS; 257 } 258 259 early_init_late(stm32_rng_init); 260 261 static TEE_Result stm32_rng_release(void) 262 { 263 if (stm32_rng && stm32_rng->release_post_boot) { 264 DMSG("Release RNG driver"); 265 assert(!stm32_rng->refcount); 266 free(stm32_rng); 267 stm32_rng = NULL; 268 } 269 270 return TEE_SUCCESS; 271 } 272 273 release_init_resource(stm32_rng_release); 274 #endif /*CFG_EMBED_DTB*/ 275