1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2018-2019, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/clk.h> 8 #include <drivers/clk_dt.h> 9 #include <drivers/stm32_rng.h> 10 #include <io.h> 11 #include <kernel/delay.h> 12 #include <kernel/dt.h> 13 #include <kernel/boot.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <libfdt.h> 17 #include <mm/core_memprot.h> 18 #include <stdbool.h> 19 #include <stm32_util.h> 20 #include <string.h> 21 22 #define DT_RNG_COMPAT "st,stm32-rng" 23 #define RNG_CR 0x00U 24 #define RNG_SR 0x04U 25 #define RNG_DR 0x08U 26 27 #define RNG_CR_RNGEN BIT(2) 28 #define RNG_CR_IE BIT(3) 29 #define RNG_CR_CED BIT(5) 30 31 #define RNG_SR_DRDY BIT(0) 32 #define RNG_SR_CECS BIT(1) 33 #define RNG_SR_SECS BIT(2) 34 #define RNG_SR_CEIS BIT(5) 35 #define RNG_SR_SEIS BIT(6) 36 37 #define RNG_TIMEOUT_US U(100000) 38 39 struct stm32_rng_instance { 40 struct io_pa_va base; 41 struct clk *clock; 42 unsigned int lock; 43 unsigned int refcount; 44 bool release_post_boot; 45 }; 46 47 static struct stm32_rng_instance *stm32_rng; 48 49 /* 50 * Extracts from the STM32 RNG specification: 51 * 52 * When a noise source (or seed) error occurs, the RNG stops generating 53 * random numbers and sets to “1” both SEIS and SECS bits to indicate 54 * that a seed error occurred. (...) 55 56 * The following sequence shall be used to fully recover from a seed 57 * error after the RNG initialization: 58 * 1. Clear the SEIS bit by writing it to “0”. 59 * 2. Read out 12 words from the RNG_DR register, and discard each of 60 * them in order to clean the pipeline. 61 * 3. Confirm that SEIS is still cleared. Random number generation is 62 * back to normal. 63 */ 64 static void conceal_seed_error(vaddr_t rng_base) 65 { 66 if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) { 67 size_t i = 0; 68 69 io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS); 70 71 for (i = 12; i != 0; i--) 72 (void)io_read32(rng_base + RNG_DR); 73 74 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 75 panic("RNG noise"); 76 } 77 } 78 79 #define RNG_FIFO_BYTE_DEPTH 16u 80 81 static TEE_Result read_available(vaddr_t rng_base, uint8_t *out, size_t *size) 82 { 83 uint8_t *buf = NULL; 84 size_t req_size = 0; 85 size_t len = 0; 86 87 conceal_seed_error(rng_base); 88 89 if (!(io_read32(rng_base + RNG_SR) & RNG_SR_DRDY)) 90 return TEE_ERROR_NO_DATA; 91 92 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 93 return TEE_ERROR_NO_DATA; 94 95 buf = out; 96 req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size); 97 len = req_size; 98 99 /* RNG is ready: read up to 4 32bit words */ 100 while (len) { 101 uint32_t data32 = io_read32(rng_base + RNG_DR); 102 size_t sz = MIN(len, sizeof(uint32_t)); 103 104 memcpy(buf, &data32, sz); 105 buf += sz; 106 len -= sz; 107 } 108 109 *size = req_size; 110 111 return TEE_SUCCESS; 112 } 113 114 static void gate_rng(bool enable, struct stm32_rng_instance *dev) 115 { 116 vaddr_t rng_cr = io_pa_or_va(&dev->base, 1) + RNG_CR; 117 uint32_t exceptions = may_spin_lock(&dev->lock); 118 119 if (enable) { 120 /* incr_refcnt return non zero if resource shall be enabled */ 121 if (incr_refcnt(&dev->refcount)) { 122 clk_enable(dev->clock); 123 io_write32(rng_cr, 0); 124 io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED); 125 } 126 } else { 127 /* decr_refcnt return non zero if resource shall be disabled */ 128 if (decr_refcnt(&dev->refcount)) { 129 io_write32(rng_cr, 0); 130 clk_disable(dev->clock); 131 } 132 } 133 134 may_spin_unlock(&dev->lock, exceptions); 135 } 136 137 TEE_Result stm32_rng_read(uint8_t *out, size_t size) 138 { 139 TEE_Result rc = TEE_ERROR_GENERIC; 140 bool burst_timeout = false; 141 uint64_t timeout_ref = 0; 142 uint32_t exceptions = 0; 143 uint8_t *out_ptr = out; 144 vaddr_t rng_base = 0; 145 size_t out_size = 0; 146 147 if (!stm32_rng) { 148 DMSG("No RNG"); 149 return TEE_ERROR_NOT_SUPPORTED; 150 } 151 152 gate_rng(true, stm32_rng); 153 rng_base = io_pa_or_va(&stm32_rng->base, 1); 154 155 /* Arm timeout */ 156 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 157 burst_timeout = false; 158 159 while (out_size < size) { 160 /* Read by chunks of the size the RNG FIFO depth */ 161 size_t sz = size - out_size; 162 163 exceptions = may_spin_lock(&stm32_rng->lock); 164 165 rc = read_available(rng_base, out_ptr, &sz); 166 167 /* Raise timeout only if we failed to get some samples */ 168 assert(!rc || rc == TEE_ERROR_NO_DATA); 169 if (rc) 170 burst_timeout = timeout_elapsed(timeout_ref); 171 172 may_spin_unlock(&stm32_rng->lock, exceptions); 173 174 if (burst_timeout) { 175 rc = TEE_ERROR_GENERIC; 176 goto out; 177 } 178 179 if (!rc) { 180 out_size += sz; 181 out_ptr += sz; 182 /* Re-arm timeout */ 183 timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 184 burst_timeout = false; 185 } 186 } 187 188 out: 189 assert(!rc || rc == TEE_ERROR_GENERIC); 190 gate_rng(false, stm32_rng); 191 192 return rc; 193 } 194 195 #ifdef CFG_EMBED_DTB 196 static TEE_Result stm32_rng_init(void) 197 { 198 void *fdt = NULL; 199 int node = -1; 200 struct dt_node_info dt_info; 201 TEE_Result res = TEE_ERROR_GENERIC; 202 203 memset(&dt_info, 0, sizeof(dt_info)); 204 205 fdt = get_embedded_dt(); 206 if (!fdt) 207 panic(); 208 209 while (true) { 210 node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT); 211 if (node < 0) 212 break; 213 214 _fdt_fill_device_info(fdt, &dt_info, node); 215 216 if (!(dt_info.status & DT_STATUS_OK_SEC)) 217 continue; 218 219 if (stm32_rng) 220 panic(); 221 222 stm32_rng = calloc(1, sizeof(*stm32_rng)); 223 if (!stm32_rng) 224 panic(); 225 226 assert(dt_info.clock != DT_INFO_INVALID_CLOCK && 227 dt_info.reg != DT_INFO_INVALID_REG && 228 dt_info.reg_size != DT_INFO_INVALID_REG_SIZE); 229 230 if (dt_info.status & DT_STATUS_OK_NSEC) { 231 stm32mp_register_non_secure_periph_iomem(dt_info.reg); 232 stm32_rng->release_post_boot = true; 233 } else { 234 stm32mp_register_secure_periph_iomem(dt_info.reg); 235 } 236 237 stm32_rng->base.pa = dt_info.reg; 238 if (!io_pa_or_va_secure(&stm32_rng->base, dt_info.reg_size)) 239 panic(); 240 241 res = clk_dt_get_by_index(fdt, node, 0, &stm32_rng->clock); 242 if (res) 243 return res; 244 245 assert(stm32_rng->clock); 246 247 DMSG("RNG init"); 248 } 249 250 return TEE_SUCCESS; 251 } 252 253 early_init_late(stm32_rng_init); 254 255 static TEE_Result stm32_rng_release(void) 256 { 257 if (stm32_rng && stm32_rng->release_post_boot) { 258 DMSG("Release RNG driver"); 259 assert(!stm32_rng->refcount); 260 free(stm32_rng); 261 stm32_rng = NULL; 262 } 263 264 return TEE_SUCCESS; 265 } 266 267 release_init_resource(stm32_rng_release); 268 #endif /*CFG_EMBED_DTB*/ 269