1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Copyright (c) 2018-2022, STMicroelectronics 4 */ 5 6 #ifndef __STM32_UTIL_H__ 7 #define __STM32_UTIL_H__ 8 9 #include <assert.h> 10 #include <drivers/clk.h> 11 #include <drivers/stm32_bsec.h> 12 #include <kernel/panic.h> 13 #include <stdint.h> 14 #include <types_ext.h> 15 16 /* Backup registers and RAM utils */ 17 vaddr_t stm32mp_bkpreg(unsigned int idx); 18 19 /* 20 * SYSCFG IO compensation. 21 * These functions assume non-secure world is suspended. 22 */ 23 void stm32mp_syscfg_enable_io_compensation(void); 24 void stm32mp_syscfg_disable_io_compensation(void); 25 26 /* Platform util for the RCC drivers */ 27 vaddr_t stm32_rcc_base(void); 28 29 /* Platform util for the GIC */ 30 vaddr_t get_gicd_base(void); 31 32 /* 33 * Platform util functions for the GPIO driver 34 * @bank: Target GPIO bank ID as per DT bindings 35 * 36 * Platform shall implement these functions to provide to stm32_gpio 37 * driver the resource reference for a target GPIO bank. That are 38 * memory mapped interface base address, interface offset (see below) 39 * and clock identifier. 40 * 41 * stm32_get_gpio_bank_offset() returns a bank offset that is used to 42 * check DT configuration matches platform implementation of the banks 43 * description. 44 */ 45 vaddr_t stm32_get_gpio_bank_base(unsigned int bank); 46 unsigned int stm32_get_gpio_bank_offset(unsigned int bank); 47 unsigned int stm32_get_gpio_bank_clock(unsigned int bank); 48 struct clk *stm32_get_gpio_bank_clk(unsigned int bank); 49 50 /* Platform util for PMIC support */ 51 bool stm32mp_with_pmic(void); 52 53 /* Power management service */ 54 #ifdef CFG_PSCI_ARM32 55 void stm32mp_register_online_cpu(void); 56 #else 57 static inline void stm32mp_register_online_cpu(void) 58 { 59 } 60 #endif 61 62 /* 63 * Generic spinlock function that bypass spinlock if MMU is disabled or 64 * lock is NULL. 65 */ 66 uint32_t may_spin_lock(unsigned int *lock); 67 void may_spin_unlock(unsigned int *lock, uint32_t exceptions); 68 69 /* Helper from platform RCC clock driver */ 70 struct clk *stm32mp_rcc_clock_id_to_clk(unsigned long clock_id); 71 72 /* Return true if @clock_id is shared by secure and non-secure worlds */ 73 bool stm32mp_nsec_can_access_clock(unsigned long clock_id); 74 75 extern const struct clk_ops stm32mp1_clk_ops; 76 77 #if defined(CFG_STPMIC1) 78 /* Return true if non-secure world can manipulate regulator @pmic_regu_name */ 79 bool stm32mp_nsec_can_access_pmic_regu(const char *pmic_regu_name); 80 #else 81 static inline bool stm32mp_nsec_can_access_pmic_regu(const char *name __unused) 82 { 83 return false; 84 } 85 #endif 86 87 /* Return true if and only if @reset_id relates to a non-secure peripheral */ 88 bool stm32mp_nsec_can_access_reset(unsigned int reset_id); 89 90 /* Return rstctrl instance related to RCC reset controller DT binding ID */ 91 struct rstctrl *stm32mp_rcc_reset_id_to_rstctrl(unsigned int binding_id); 92 93 /* 94 * Structure and API function for BSEC driver to get some platform data. 95 * 96 * @base: BSEC interface registers physical base address 97 * @upper_start: Base ID for the BSEC upper words in the platform 98 * @max_id: Max value for BSEC word ID for the platform 99 */ 100 struct stm32_bsec_static_cfg { 101 paddr_t base; 102 unsigned int upper_start; 103 unsigned int max_id; 104 }; 105 106 void stm32mp_get_bsec_static_cfg(struct stm32_bsec_static_cfg *cfg); 107 108 /* 109 * Return true if platform is in closed_device mode 110 */ 111 bool stm32mp_is_closed_device(void); 112 113 /* 114 * Shared reference counter: increments by 2 on secure increment 115 * request, decrements by 2 on secure decrement request. Bit #0 116 * is set to 1 on non-secure increment request and reset to 0 on 117 * non-secure decrement request. These counters initialize to 118 * either 0, 1 or 2 upon their expect default state. 119 * Counters saturate to UINT_MAX / 2. 120 */ 121 #define SHREFCNT_NONSECURE_FLAG 0x1ul 122 #define SHREFCNT_SECURE_STEP 0x2ul 123 #define SHREFCNT_MAX (UINT_MAX / 2) 124 125 /* Return 1 if refcnt increments from 0, else return 0 */ 126 static inline int incr_shrefcnt(unsigned int *refcnt, bool secure) 127 { 128 int rc = !*refcnt; 129 130 if (secure) { 131 if (*refcnt < SHREFCNT_MAX) { 132 *refcnt += SHREFCNT_SECURE_STEP; 133 assert(*refcnt < SHREFCNT_MAX); 134 } 135 } else { 136 *refcnt |= SHREFCNT_NONSECURE_FLAG; 137 } 138 139 return rc; 140 } 141 142 /* Return 1 if refcnt decrements to 0, else return 0 */ 143 static inline int decr_shrefcnt(unsigned int *refcnt, bool secure) 144 { 145 int rc = 0; 146 147 if (secure) { 148 if (*refcnt < SHREFCNT_MAX) { 149 if (*refcnt < SHREFCNT_SECURE_STEP) 150 panic(); 151 152 *refcnt -= SHREFCNT_SECURE_STEP; 153 rc = !*refcnt; 154 } 155 } else { 156 rc = (*refcnt == SHREFCNT_NONSECURE_FLAG); 157 *refcnt &= ~SHREFCNT_NONSECURE_FLAG; 158 } 159 160 return rc; 161 } 162 163 static inline int incr_refcnt(unsigned int *refcnt) 164 { 165 return incr_shrefcnt(refcnt, true); 166 } 167 168 static inline int decr_refcnt(unsigned int *refcnt) 169 { 170 return decr_shrefcnt(refcnt, true); 171 } 172 173 /* 174 * Shared peripherals and resources registration 175 * 176 * Resources listed in enum stm32mp_shres assigned at run-time to the 177 * non-secure world, to the secure world or shared by both worlds. 178 * In the later case, there must exist a secure service in OP-TEE 179 * for the non-secure world to access the resource. 180 * 181 * Resources may be a peripheral, a bus, a clock or a memory. 182 * 183 * Shared resources driver API functions allows drivers to register the 184 * resource as secure, non-secure or shared and to get the resource 185 * assignation state. 186 */ 187 #define STM32MP1_SHRES_GPIOZ(i) (STM32MP1_SHRES_GPIOZ_0 + i) 188 189 enum stm32mp_shres { 190 STM32MP1_SHRES_GPIOZ_0 = 0, 191 STM32MP1_SHRES_GPIOZ_1, 192 STM32MP1_SHRES_GPIOZ_2, 193 STM32MP1_SHRES_GPIOZ_3, 194 STM32MP1_SHRES_GPIOZ_4, 195 STM32MP1_SHRES_GPIOZ_5, 196 STM32MP1_SHRES_GPIOZ_6, 197 STM32MP1_SHRES_GPIOZ_7, 198 STM32MP1_SHRES_IWDG1, 199 STM32MP1_SHRES_USART1, 200 STM32MP1_SHRES_SPI6, 201 STM32MP1_SHRES_I2C4, 202 STM32MP1_SHRES_RNG1, 203 STM32MP1_SHRES_HASH1, 204 STM32MP1_SHRES_CRYP1, 205 STM32MP1_SHRES_I2C6, 206 STM32MP1_SHRES_RTC, 207 STM32MP1_SHRES_MCU, 208 STM32MP1_SHRES_PLL3, 209 STM32MP1_SHRES_MDMA, 210 211 STM32MP1_SHRES_COUNT 212 }; 213 214 /* Register resource @id as a secure peripheral */ 215 void stm32mp_register_secure_periph(enum stm32mp_shres id); 216 217 /* Register resource @id as a non-secure peripheral */ 218 void stm32mp_register_non_secure_periph(enum stm32mp_shres id); 219 220 /* 221 * Register resource identified by @base as a secure peripheral 222 * @base: IOMEM physical base address of the resource 223 */ 224 void stm32mp_register_secure_periph_iomem(vaddr_t base); 225 226 /* 227 * Register resource identified by @base as a non-secure peripheral 228 * @base: IOMEM physical base address of the resource 229 */ 230 void stm32mp_register_non_secure_periph_iomem(vaddr_t base); 231 232 /* 233 * Register GPIO resource as a secure peripheral 234 * @bank: Bank of the target GPIO 235 * @pin: Bit position of the target GPIO in the bank 236 */ 237 void stm32mp_register_secure_gpio(unsigned int bank, unsigned int pin); 238 239 /* 240 * Register GPIO resource as a non-secure peripheral 241 * @bank: Bank of the target GPIO 242 * @pin: Bit position of the target GPIO in the bank 243 */ 244 void stm32mp_register_non_secure_gpio(unsigned int bank, unsigned int pin); 245 246 /* Return true if and only if resource @id is registered as secure */ 247 bool stm32mp_periph_is_secure(enum stm32mp_shres id); 248 249 /* Return true if and only if GPIO bank @bank is registered as secure */ 250 bool stm32mp_gpio_bank_is_secure(unsigned int bank); 251 252 /* Return true if and only if GPIO bank @bank is registered as shared */ 253 bool stm32mp_gpio_bank_is_shared(unsigned int bank); 254 255 /* Return true if and only if GPIO bank @bank is registered as non-secure */ 256 bool stm32mp_gpio_bank_is_non_secure(unsigned int bank); 257 258 #if defined(CFG_STM32MP15) 259 /* Register parent clocks of @clock (ID used in clock DT bindings) as secure */ 260 void stm32mp_register_clock_parents_secure(unsigned long clock_id); 261 #else 262 static inline void stm32mp_register_clock_parents_secure(unsigned long clock_id 263 __unused) 264 { 265 } 266 #endif 267 268 #endif /*__STM32_UTIL_H__*/ 269