1 // SPDX-License-Identifier: BSD-3-Clause 2 /* 3 * Copyright (c) 2018-2019, STMicroelectronics 4 */ 5 6 #include <assert.h> 7 #include <drivers/clk.h> 8 #include <drivers/clk_dt.h> 9 #include <drivers/stm32_rng.h> 10 #include <io.h> 11 #include <kernel/delay.h> 12 #include <kernel/dt.h> 13 #include <kernel/boot.h> 14 #include <kernel/panic.h> 15 #include <kernel/thread.h> 16 #include <libfdt.h> 17 #include <mm/core_memprot.h> 18 #include <stdbool.h> 19 #include <stm32_util.h> 20 #include <string.h> 21 22 #define DT_RNG_COMPAT "st,stm32-rng" 23 #define RNG_CR 0x00U 24 #define RNG_SR 0x04U 25 #define RNG_DR 0x08U 26 27 #define RNG_CR_RNGEN BIT(2) 28 #define RNG_CR_IE BIT(3) 29 #define RNG_CR_CED BIT(5) 30 31 #define RNG_SR_DRDY BIT(0) 32 #define RNG_SR_CECS BIT(1) 33 #define RNG_SR_SECS BIT(2) 34 #define RNG_SR_CEIS BIT(5) 35 #define RNG_SR_SEIS BIT(6) 36 37 #define RNG_TIMEOUT_US 10000 38 39 struct stm32_rng_instance { 40 struct io_pa_va base; 41 struct clk *clock; 42 unsigned int lock; 43 unsigned int refcount; 44 }; 45 46 static struct stm32_rng_instance *stm32_rng; 47 48 /* 49 * Extracts from the STM32 RNG specification: 50 * 51 * When a noise source (or seed) error occurs, the RNG stops generating 52 * random numbers and sets to “1” both SEIS and SECS bits to indicate 53 * that a seed error occurred. (...) 54 55 * The following sequence shall be used to fully recover from a seed 56 * error after the RNG initialization: 57 * 1. Clear the SEIS bit by writing it to “0”. 58 * 2. Read out 12 words from the RNG_DR register, and discard each of 59 * them in order to clean the pipeline. 60 * 3. Confirm that SEIS is still cleared. Random number generation is 61 * back to normal. 62 */ 63 static void conceal_seed_error(vaddr_t rng_base) 64 { 65 if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) { 66 size_t i = 0; 67 68 io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS); 69 70 for (i = 12; i != 0; i--) 71 (void)io_read32(rng_base + RNG_DR); 72 73 if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS) 74 panic("RNG noise"); 75 } 76 } 77 78 #define RNG_FIFO_BYTE_DEPTH 16u 79 80 TEE_Result stm32_rng_read_raw(vaddr_t rng_base, uint8_t *out, size_t *size) 81 { 82 bool enabled = false; 83 TEE_Result rc = TEE_ERROR_SECURITY; 84 uint64_t timeout_ref = timeout_init_us(RNG_TIMEOUT_US); 85 86 if (!(io_read32(rng_base + RNG_CR) & RNG_CR_RNGEN)) { 87 /* Enable RNG if not, clock error is disabled */ 88 io_write32(rng_base + RNG_CR, RNG_CR_RNGEN | RNG_CR_CED); 89 enabled = true; 90 } 91 92 /* Wait RNG has produced well seeded random samples */ 93 while (!timeout_elapsed(timeout_ref)) { 94 conceal_seed_error(rng_base); 95 96 if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY) 97 break; 98 } 99 100 if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY) { 101 uint8_t *buf = out; 102 size_t req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size); 103 size_t len = req_size; 104 105 /* RNG is ready: read up to 4 32bit words */ 106 while (len) { 107 uint32_t data32 = io_read32(rng_base + RNG_DR); 108 size_t sz = MIN(len, sizeof(uint32_t)); 109 110 memcpy(buf, &data32, sz); 111 buf += sz; 112 len -= sz; 113 } 114 rc = TEE_SUCCESS; 115 *size = req_size; 116 } 117 118 if (enabled) 119 io_write32(rng_base + RNG_CR, 0); 120 121 return rc; 122 } 123 124 static void gate_rng(bool enable, struct stm32_rng_instance *dev) 125 { 126 vaddr_t rng_cr = io_pa_or_va(&dev->base, 1) + RNG_CR; 127 uint32_t exceptions = may_spin_lock(&dev->lock); 128 129 if (enable) { 130 /* incr_refcnt return non zero if resource shall be enabled */ 131 if (incr_refcnt(&dev->refcount)) { 132 clk_enable(dev->clock); 133 io_write32(rng_cr, 0); 134 io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED); 135 } 136 } else { 137 /* decr_refcnt return non zero if resource shall be disabled */ 138 if (decr_refcnt(&dev->refcount)) { 139 io_write32(rng_cr, 0); 140 clk_disable(dev->clock); 141 } 142 } 143 144 may_spin_unlock(&dev->lock, exceptions); 145 } 146 147 TEE_Result stm32_rng_read(uint8_t *out, size_t size) 148 { 149 TEE_Result rc = 0; 150 uint32_t exceptions = 0; 151 vaddr_t rng_base = io_pa_or_va(&stm32_rng->base, 1); 152 uint8_t *out_ptr = out; 153 size_t out_size = 0; 154 155 if (!stm32_rng) { 156 DMSG("No RNG"); 157 return TEE_ERROR_NOT_SUPPORTED; 158 } 159 160 gate_rng(true, stm32_rng); 161 162 while (out_size < size) { 163 /* Read by chunks of the size the RNG FIFO depth */ 164 size_t sz = size - out_size; 165 166 exceptions = may_spin_lock(&stm32_rng->lock); 167 168 rc = stm32_rng_read_raw(rng_base, out_ptr, &sz); 169 170 may_spin_unlock(&stm32_rng->lock, exceptions); 171 172 if (rc) 173 goto bail; 174 175 out_size += sz; 176 out_ptr += sz; 177 } 178 179 bail: 180 gate_rng(false, stm32_rng); 181 if (rc) 182 memset(out, 0, size); 183 184 return rc; 185 } 186 187 #ifdef CFG_EMBED_DTB 188 static TEE_Result stm32_rng_init(void) 189 { 190 void *fdt = NULL; 191 int node = -1; 192 struct dt_node_info dt_info; 193 enum teecore_memtypes mtype = MEM_AREA_END; 194 TEE_Result res = TEE_ERROR_GENERIC; 195 196 memset(&dt_info, 0, sizeof(dt_info)); 197 198 fdt = get_embedded_dt(); 199 if (!fdt) 200 panic(); 201 202 while (true) { 203 node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT); 204 if (node < 0) 205 break; 206 207 _fdt_fill_device_info(fdt, &dt_info, node); 208 209 if (!(dt_info.status & DT_STATUS_OK_SEC)) 210 continue; 211 212 if (stm32_rng) 213 panic(); 214 215 stm32_rng = calloc(1, sizeof(*stm32_rng)); 216 if (!stm32_rng) 217 panic(); 218 219 assert(dt_info.clock != DT_INFO_INVALID_CLOCK && 220 dt_info.reg != DT_INFO_INVALID_REG && 221 dt_info.reg_size != DT_INFO_INVALID_REG_SIZE); 222 223 if (dt_info.status & DT_STATUS_OK_NSEC) { 224 stm32mp_register_non_secure_periph_iomem(dt_info.reg); 225 mtype = MEM_AREA_IO_NSEC; 226 } else { 227 stm32mp_register_secure_periph_iomem(dt_info.reg); 228 mtype = MEM_AREA_IO_SEC; 229 } 230 231 stm32_rng->base.pa = dt_info.reg; 232 stm32_rng->base.va = (vaddr_t)phys_to_virt(dt_info.reg, mtype, 233 dt_info.reg_size); 234 235 res = clk_dt_get_by_index(fdt, node, 0, &stm32_rng->clock); 236 if (res) 237 return res; 238 239 assert(stm32_rng->clock); 240 241 DMSG("RNG init"); 242 } 243 244 return TEE_SUCCESS; 245 } 246 247 driver_init(stm32_rng_init); 248 #endif /*CFG_EMBED_DTB*/ 249