xref: /optee_os/core/drivers/stm32_rng.c (revision d8682c4caf49d10253c3afceb49cdf7f50861dac)
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Copyright (c) 2018-2019, STMicroelectronics
4  */
5 
6 #include <assert.h>
7 #include <drivers/clk.h>
8 #include <drivers/clk_dt.h>
9 #include <drivers/stm32_rng.h>
10 #include <io.h>
11 #include <kernel/delay.h>
12 #include <kernel/dt.h>
13 #include <kernel/boot.h>
14 #include <kernel/panic.h>
15 #include <kernel/thread.h>
16 #include <libfdt.h>
17 #include <mm/core_memprot.h>
18 #include <stdbool.h>
19 #include <stm32_util.h>
20 #include <string.h>
21 
22 #define DT_RNG_COMPAT		"st,stm32-rng"
23 #define RNG_CR			0x00U
24 #define RNG_SR			0x04U
25 #define RNG_DR			0x08U
26 
27 #define RNG_CR_RNGEN		BIT(2)
28 #define RNG_CR_IE		BIT(3)
29 #define RNG_CR_CED		BIT(5)
30 
31 #define RNG_SR_DRDY		BIT(0)
32 #define RNG_SR_CECS		BIT(1)
33 #define RNG_SR_SECS		BIT(2)
34 #define RNG_SR_CEIS		BIT(5)
35 #define RNG_SR_SEIS		BIT(6)
36 
37 #define RNG_TIMEOUT_US		10000
38 
39 struct stm32_rng_instance {
40 	struct io_pa_va base;
41 	struct clk *clock;
42 	unsigned int lock;
43 	unsigned int refcount;
44 	bool release_post_boot;
45 };
46 
47 static struct stm32_rng_instance *stm32_rng;
48 
49 /*
50  * Extracts from the STM32 RNG specification:
51  *
52  * When a noise source (or seed) error occurs, the RNG stops generating
53  * random numbers and sets to “1” both SEIS and SECS bits to indicate
54  * that a seed error occurred. (...)
55 
56  * The following sequence shall be used to fully recover from a seed
57  * error after the RNG initialization:
58  * 1. Clear the SEIS bit by writing it to “0”.
59  * 2. Read out 12 words from the RNG_DR register, and discard each of
60  * them in order to clean the pipeline.
61  * 3. Confirm that SEIS is still cleared. Random number generation is
62  * back to normal.
63  */
64 static void conceal_seed_error(vaddr_t rng_base)
65 {
66 	if (io_read32(rng_base + RNG_SR) & (RNG_SR_SECS | RNG_SR_SEIS)) {
67 		size_t i = 0;
68 
69 		io_mask32(rng_base + RNG_SR, 0, RNG_SR_SEIS);
70 
71 		for (i = 12; i != 0; i--)
72 			(void)io_read32(rng_base + RNG_DR);
73 
74 		if (io_read32(rng_base + RNG_SR) & RNG_SR_SEIS)
75 			panic("RNG noise");
76 	}
77 }
78 
79 #define RNG_FIFO_BYTE_DEPTH		16u
80 
81 TEE_Result stm32_rng_read_raw(vaddr_t rng_base, uint8_t *out, size_t *size)
82 {
83 	bool enabled = false;
84 	TEE_Result rc = TEE_ERROR_SECURITY;
85 	uint64_t timeout_ref = timeout_init_us(RNG_TIMEOUT_US);
86 
87 	if (!(io_read32(rng_base + RNG_CR) & RNG_CR_RNGEN)) {
88 		/* Enable RNG if not, clock error is disabled */
89 		io_write32(rng_base + RNG_CR, RNG_CR_RNGEN | RNG_CR_CED);
90 		enabled = true;
91 	}
92 
93 	/* Wait RNG has produced well seeded random samples */
94 	while (!timeout_elapsed(timeout_ref)) {
95 		conceal_seed_error(rng_base);
96 
97 		if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY)
98 			break;
99 	}
100 
101 	if (io_read32(rng_base + RNG_SR) & RNG_SR_DRDY) {
102 		uint8_t *buf = out;
103 		size_t req_size = MIN(RNG_FIFO_BYTE_DEPTH, *size);
104 		size_t len = req_size;
105 
106 		/* RNG is ready: read up to 4 32bit words */
107 		while (len) {
108 			uint32_t data32 = io_read32(rng_base + RNG_DR);
109 			size_t sz = MIN(len, sizeof(uint32_t));
110 
111 			memcpy(buf, &data32, sz);
112 			buf += sz;
113 			len -= sz;
114 		}
115 		rc = TEE_SUCCESS;
116 		*size = req_size;
117 	}
118 
119 	if (enabled)
120 		io_write32(rng_base + RNG_CR, 0);
121 
122 	return rc;
123 }
124 
125 static void gate_rng(bool enable, struct stm32_rng_instance *dev)
126 {
127 	vaddr_t rng_cr = io_pa_or_va(&dev->base, 1) + RNG_CR;
128 	uint32_t exceptions = may_spin_lock(&dev->lock);
129 
130 	if (enable) {
131 		/* incr_refcnt return non zero if resource shall be enabled */
132 		if (incr_refcnt(&dev->refcount)) {
133 			clk_enable(dev->clock);
134 			io_write32(rng_cr, 0);
135 			io_write32(rng_cr, RNG_CR_RNGEN | RNG_CR_CED);
136 		}
137 	} else {
138 		/* decr_refcnt return non zero if resource shall be disabled */
139 		if (decr_refcnt(&dev->refcount)) {
140 			io_write32(rng_cr, 0);
141 			clk_disable(dev->clock);
142 		}
143 	}
144 
145 	may_spin_unlock(&dev->lock, exceptions);
146 }
147 
148 TEE_Result stm32_rng_read(uint8_t *out, size_t size)
149 {
150 	TEE_Result rc = 0;
151 	uint32_t exceptions = 0;
152 	vaddr_t rng_base = io_pa_or_va(&stm32_rng->base, 1);
153 	uint8_t *out_ptr = out;
154 	size_t out_size = 0;
155 
156 	if (!stm32_rng) {
157 		DMSG("No RNG");
158 		return TEE_ERROR_NOT_SUPPORTED;
159 	}
160 
161 	gate_rng(true, stm32_rng);
162 
163 	while (out_size < size) {
164 		/* Read by chunks of the size the RNG FIFO depth */
165 		size_t sz = size - out_size;
166 
167 		exceptions = may_spin_lock(&stm32_rng->lock);
168 
169 		rc = stm32_rng_read_raw(rng_base, out_ptr, &sz);
170 
171 		may_spin_unlock(&stm32_rng->lock, exceptions);
172 
173 		if (rc)
174 			goto bail;
175 
176 		out_size += sz;
177 		out_ptr += sz;
178 	}
179 
180 bail:
181 	gate_rng(false, stm32_rng);
182 	if (rc)
183 		memset(out, 0, size);
184 
185 	return rc;
186 }
187 
188 #ifdef CFG_EMBED_DTB
189 static TEE_Result stm32_rng_init(void)
190 {
191 	void *fdt = NULL;
192 	int node = -1;
193 	struct dt_node_info dt_info;
194 	TEE_Result res = TEE_ERROR_GENERIC;
195 
196 	memset(&dt_info, 0, sizeof(dt_info));
197 
198 	fdt = get_embedded_dt();
199 	if (!fdt)
200 		panic();
201 
202 	while (true) {
203 		node = fdt_node_offset_by_compatible(fdt, node, DT_RNG_COMPAT);
204 		if (node < 0)
205 			break;
206 
207 		_fdt_fill_device_info(fdt, &dt_info, node);
208 
209 		if (!(dt_info.status & DT_STATUS_OK_SEC))
210 			continue;
211 
212 		if (stm32_rng)
213 			panic();
214 
215 		stm32_rng = calloc(1, sizeof(*stm32_rng));
216 		if (!stm32_rng)
217 			panic();
218 
219 		assert(dt_info.clock != DT_INFO_INVALID_CLOCK &&
220 		       dt_info.reg != DT_INFO_INVALID_REG &&
221 		       dt_info.reg_size != DT_INFO_INVALID_REG_SIZE);
222 
223 		if (dt_info.status & DT_STATUS_OK_NSEC) {
224 			stm32mp_register_non_secure_periph_iomem(dt_info.reg);
225 			stm32_rng->release_post_boot = true;
226 		} else {
227 			stm32mp_register_secure_periph_iomem(dt_info.reg);
228 		}
229 
230 		stm32_rng->base.pa = dt_info.reg;
231 		if (!io_pa_or_va_secure(&stm32_rng->base, dt_info.reg_size))
232 			panic();
233 
234 		res = clk_dt_get_by_index(fdt, node, 0, &stm32_rng->clock);
235 		if (res)
236 			return res;
237 
238 		assert(stm32_rng->clock);
239 
240 		DMSG("RNG init");
241 	}
242 
243 	return TEE_SUCCESS;
244 }
245 
246 early_init_late(stm32_rng_init);
247 
248 static TEE_Result stm32_rng_release(void)
249 {
250 	if (stm32_rng && stm32_rng->release_post_boot) {
251 		DMSG("Release RNG driver");
252 		assert(!stm32_rng->refcount);
253 		free(stm32_rng);
254 		stm32_rng = NULL;
255 	}
256 
257 	return TEE_SUCCESS;
258 }
259 
260 release_init_resource(stm32_rng_release);
261 #endif /*CFG_EMBED_DTB*/
262