core: drivers: ls_sfp: Add missing argument in dt_map_dev() function call

dt_map_dev() function call is missing an argument which results in
compilation error. Add the missing argument.

Fixes: 011c

core: drivers: ls_sfp: Add missing argument in dt_map_dev() function call

dt_map_dev() function call is missing an argument which results in
compilation error. Add the missing argument.

Fixes: 011c182a606b ("core: drivers: nxp: Add LX series SFP driver")
Signed-off-by: Sriram Sriram <sriramsriram@microsoft.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Sahil Malhotra <sahil.malhotra@nxp.com>

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core: update FS storage API with user space buffer

Updates the create(), read(), and write() function pointers in struct
ts_store_ops to take a user space buffer in addition to the previous
core buf

core: update FS storage API with user space buffer

Updates the create(), read(), and write() function pointers in struct
ts_store_ops to take a user space buffer in addition to the previous
core buffer. Core buffers are normal secure memory while user space
buffers should only be accessed using the user_access.h functions.

The different FS storage implementations are updated accordingly.

Note that the RPMB FS storage implementation resorts to using
enter_user_access() and exit_user_access() due to internal complexities.

Fixes: 4e154320e47c ("core: Apply finer-grained PAN")
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>

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crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()

Add X25519 and X448 drvcrypt.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linar

crypto: add drvcrypt_register_x25519() and drvcrypt_register_x448()

Add X25519 and X448 drvcrypt.

Signed-off-by: loubaihui <loubaihui1@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: stm32_gpio: move definitions to source file

Moves macros and structures definitions from stm32_gpio.h header file
to the driver source file as these definition do not need to be
visible fro

drivers: stm32_gpio: move definitions to source file

Moves macros and structures definitions from stm32_gpio.h header file
to the driver source file as these definition do not need to be
visible from other drivers thank to pin control abstraction.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

drivers: stm32_i2c: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

drivers: stm32_uart: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL

Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making
I2C driver to get pin control configuration using the generic pin
control fram

drivers: stm32_i2c: support CFG_DRIVERS_PINCTRL

Updates stm32_i2c driver for when CFG_DRIVERS_PINCTRL is enabled making
I2C driver to get pin control configuration using the generic pin
control framework. When enabled, stm32_i2c driver get the active and
sleep pin control configuration from the device tree. Sleep pinctrl
configuration is optional.

SE050 and STM32MP1 PMIC drivers that use the stm32_i2c bus are both
updated accordingly.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_uart: support CFG_DRIVERS_PINCTRL

Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making
UART driver to get pin control configuration using the generic pin
control f

drivers: stm32_uart: support CFG_DRIVERS_PINCTRL

Updates stm32_uart driver for when CFG_DRIVERS_PINCTRL is enabled making
UART driver to get pin control configuration using the generic pin
control framework.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()

Adds helper function stm32_pinctrl_set_secure_cfg() to set the
GPIO pin secure state (secure or non-secure) for each pin refer

drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()

Adds helper function stm32_pinctrl_set_secure_cfg() to set the
GPIO pin secure state (secure or non-secure) for each pin referenced
by a pin control state.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: add helper function stm32_gpio_pinctrl_bank_pin()

Adds helper function stm32_gpio_pinctrl_bank_pin() to get an array
of bank and pin IDs related to a pin control state.

Acked-b

drivers: stm32_gpio: add helper function stm32_gpio_pinctrl_bank_pin()

Adds helper function stm32_gpio_pinctrl_bank_pin() to get an array
of bank and pin IDs related to a pin control state.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_gpio: support CFG_DRIVERS_PINCTRL

Changes stm32_gpio driver to support generic pin control framework
(CFG_DRIVERS_PINCTRL=y).

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.c

drivers: stm32_gpio: support CFG_DRIVERS_PINCTRL

Changes stm32_gpio driver to support generic pin control framework
(CFG_DRIVERS_PINCTRL=y).

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: caam: fix size of CMAC update data

In case of an update operation, the total input data size processed
must be a multiple of a block size. The total block size is equal to
the input data si

drivers: caam: fix size of CMAC update data

In case of an update operation, the total input data size processed
must be a multiple of a block size. The total block size is equal to
the input data size and the saved buffer size.

If the reallocation DMA buffer is less than the input data size,
buffer length plus saved buffer size need to be adjusted to align
on multiple of a block size.

Depending on the memory buffer input configuration, the function
caam_dmaobj_sgtbuf_build() might modify the data size to be processed in
the loop.

This case happens sometimes on i.MX platforms where the input buffer
physical address in above 32 bits. This implies reporting the data size
re-ajustment when data is saved in the context buffer.

Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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riscv: driver: implement platform-level interrupt controller (PLIC) driver

An initial implementation of RISC-V PLIC driver conforming
to the specification. CFG_RISCV_PLIC flag allows building it
or

riscv: driver: implement platform-level interrupt controller (PLIC) driver

An initial implementation of RISC-V PLIC driver conforming
to the specification. CFG_RISCV_PLIC flag allows building it
or not for platforms with custom PLIC IP.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: stm32_bsec: implement the get otp by phandle

Add a new interface stm32_bsec_find_otp_by_phandle() to retrieve
localization of an OTP from a given node phandle.

When the node phandle is abs

drivers: stm32_bsec: implement the get otp by phandle

Add a new interface stm32_bsec_find_otp_by_phandle() to retrieve
localization of an OTP from a given node phandle.

When the node phandle is absent in the NVMEM node, layout_cell->phandle = 0
and reference to this OTP with this API function is not possible.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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drivers: stm32_bsec: add support for bits property in the DT

Adds the possibility to specify the number of managed bit in the NVMEM
cell device tree description, using the optional bits property
and

drivers: stm32_bsec: add support for bits property in the DT

Adds the possibility to specify the number of managed bit in the NVMEM
cell device tree description, using the optional bits property
and removes restriction on aligned NVMEM cell on 32-bit word by supporting
bit offset in stm32_bsec_find_otp_in_nvmem_layout().

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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drivers: stm32_bsec: keep stm32_bsec_permanent_lock_otp() under flag

Keep the function to access the OTP lock under the CFG_STM32_BSEC_WRITE
flag to align with the write function.

Reviewed-by: Etie

drivers: stm32_bsec: keep stm32_bsec_permanent_lock_otp() under flag

Keep the function to access the OTP lock under the CFG_STM32_BSEC_WRITE
flag to align with the write function.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>

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drivers: stm32_bsec: add BSEC_DEN_ALL_MSK support

Correctly handle the reserved bits in register BSEC_DEN with the mask
BSEC_DEN_ALL_MSK.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com

drivers: stm32_bsec: add BSEC_DEN_ALL_MSK support

Correctly handle the reserved bits in register BSEC_DEN with the mask
BSEC_DEN_ALL_MSK.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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drivers: stm32_bsec: fix stm32_bsec_find_otp_in_nvmem_layout()

Remove the unnecessary ';' at the end of the function.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Pat

drivers: stm32_bsec: fix stm32_bsec_find_otp_in_nvmem_layout()

Remove the unnecessary ';' at the end of the function.

Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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core: arm: Move some DT functions to common kernel

Some existed functions for device tree in ARM could be also used for
other architectures. This commit moves most of functions from ARM
architecture

core: arm: Move some DT functions to common kernel

Some existed functions for device tree in ARM could be also used for
other architectures. This commit moves most of functions from ARM
architecture into "core/kernel/dt.c", including external DT descriptor,
DT overlay, external DT initialization, API for adding DT child nodes
and reserved-memory nodes. Since "core/kernel/dt.c" is dependent with
CFG_DT, other functions which are independent with CFG_DT are put into
new file "core/kernel/boot.c".

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: crypto_bignum_free(): add indirection and set pointer to NULL

To prevent human mistake, crypto_bignum_free() sets the location of the
bignum pointer to NULL after freeing it.

Signed-off-by: J

core: crypto_bignum_free(): add indirection and set pointer to NULL

To prevent human mistake, crypto_bignum_free() sets the location of the
bignum pointer to NULL after freeing it.

Signed-off-by: Jihwan Park <jihwp@amazon.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_bsec: fix timeouts initialization

If OP-TEE is rescheduled right after the timeouts are initialized in
power_down_safmem() and power_up_safmem(), the timeout might be elapsed
when res

drivers: stm32_bsec: fix timeouts initialization

If OP-TEE is rescheduled right after the timeouts are initialized in
power_down_safmem() and power_up_safmem(), the timeout might be elapsed
when resuming the function. This would cause the while loop to break
instantly and there will be no delay between configuring the registers
and reading the status.

Initializes the timeout after configuring the registers.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_i2c: fix pin secure configuration for STM32MP13

Fixes the implementation for configuring I2C pins as secure
for STM32MP13. The implementation must consider the number of pins
in the r

drivers: stm32_i2c: fix pin secure configuration for STM32MP13

Fixes the implementation for configuring I2C pins as secure
for STM32MP13. The implementation must consider the number of pins
in the related pinctrl instance.

Fixes: 1c81e5f9458a ("drivers: stm32_gpio: temporary GPIO configuration for STM32MP13")
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_etzpc: register to dt_driver as simple bus

Registers stm32_etzpc driver to dt_drver as simple bus as expected
by forth coming update of STM32MP13 SoC variant DTSI files.

Removes stm3

drivers: stm32_etzpc: register to dt_driver as simple bus

Registers stm32_etzpc driver to dt_drver as simple bus as expected
by forth coming update of STM32MP13 SoC variant DTSI files.

Removes stm32_etzpc_init() that is not used by the platform.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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drivers: stm32_rstctrl: add STM32MP13 compatible

Updates stm32_rstctrl driver for STM32MP13 variant support.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carri

drivers: stm32_rstctrl: add STM32MP13 compatible

Updates stm32_rstctrl driver for STM32MP13 variant support.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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