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Searched refs:_REG32_CLR (Results 1 – 7 of 7) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsio/
H A DhalTSIO.c75 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
2191 _REG32_CLR(&(_TSIOCtrl3->TSIO_FILTER[u16FltId]), TSIO3_FILTER_ENABLE); in HAL_TSIO_Filter_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsio/
H A DhalTSIO.c75 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
2191 _REG32_CLR(&(_TSIOCtrl3->TSIO_FILTER[u16FltId]), TSIO3_FILTER_ENABLE); in HAL_TSIO_Filter_Enable()
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tso/
H A DhalTSO.c96 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tso/
H A DhalTSO.c96 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tso/
H A DhalTSO.c96 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tso/
H A DhalTSO.c96 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tso/
H A DhalTSO.c97 #define _REG32_CLR(reg, value); _HAL_REG32_W(reg, RESET_FLAG1(_HAL_REG32_R(reg), value)); macro