| /utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/ |
| H A D | halTSP.c | 257 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
665 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
670 …RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
776 return _HAL_REG32_R(&_TspCtrl[0].SwInt_Stat); in HAL_TSP_SW_INT_STATUS()
781 …u32SwIntStatus |= ((_HAL_REG32_R(&_TspCtrl[0].SwInt_Stat1_H) & TSP_SWINT1_H_MASK) >> TSP_SWINT1_H_… in HAL_TSP_SW_INT_STATUS()
826 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetNMask()
877 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_VerReset()
886 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
890 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
997 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/ |
| H A D | halTSP.c | 261 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
669 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
674 …RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
780 return _HAL_REG32_R(&_TspCtrl[0].SwInt_Stat); in HAL_TSP_SW_INT_STATUS()
785 …u32SwIntStatus |= ((_HAL_REG32_R(&_TspCtrl[0].SwInt_Stat1_H) & TSP_SWINT1_H_MASK) >> TSP_SWINT1_H_… in HAL_TSP_SW_INT_STATUS()
830 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetNMask()
881 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_VerReset()
890 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
894 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
1001 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/ |
| H A D | halTSP.c | 258 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
666 … SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
671 …RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_match_pid_scr_ts_ld| TSP_match_pid_scr_fi_ld)); in HAL_TSP_Scmb_Detect()
777 return _HAL_REG32_R(&_TspCtrl[0].SwInt_Stat); in HAL_TSP_SW_INT_STATUS()
782 …u32SwIntStatus |= ((_HAL_REG32_R(&_TspCtrl[0].SwInt_Stat1_H) & TSP_SWINT1_H_MASK) >> TSP_SWINT1_H_… in HAL_TSP_SW_INT_STATUS()
827 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetNMask()
878 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_VerReset()
887 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
891 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)); in HAL_TSP_SecFlt_SetDataAddr()
998 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_BYTE_TIMER_EN)); in HAL_TSP_CmdQ_TsDma_Start()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | halTSP.c | 370 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
422 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
426 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
430 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
723 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
761 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
762 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
862 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
867 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
877 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | halTSP.c | 433 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
485 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
489 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
493 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
786 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
824 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
825 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
925 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
930 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
940 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | halTSP.c | 323 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
357 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
361 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
647 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
701 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
702 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
802 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
807 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
817 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
820 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA1_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | halTSP.c | 419 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
471 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
475 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
479 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
772 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
810 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
811 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
911 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
916 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
926 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | halTSP.c | 439 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
491 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
495 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
499 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
792 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
830 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
831 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
931 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
936 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
946 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | halTSP.c | 457 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
509 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
513 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
517 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
810 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
848 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
849 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
949 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
954 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
964 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | halTSP.c | 457 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
509 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
513 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
517 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
810 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
848 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
849 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
949 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
954 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
964 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | halTSP.c | 439 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
491 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF0_ENABLE)); in _HAL_TSP_tsif_select()
495 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].Hw_Config4), TSP_HW_CFG4_TSIF1_ENABLE)); in _HAL_TSP_tsif_select()
499 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].PVR2_Config), TSP_TSIF2_ENABLE)); in _HAL_TSP_tsif_select()
792 while (0 != _HAL_REG32_R(&_TspCtrl[0].MCU_Cmd)) in _HAL_TSP_CMD_Write_HWPCR_Reg()
830 _u32PcrFltBuf[0] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[0])); in HAL_TSP_SaveFltState()
831 _u32PcrFltBuf[1] = _HAL_REG32_R(&(_TspCtrl3[0].PIDFLR_PCR[1])); in HAL_TSP_SaveFltState()
931 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
936 RESET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg160C), TSP_OPT_ORACESS_TIMING)); in HAL_TSP_ORAcess_Optimize()
946 …_HAL_REG32_W(&_TspCtrl[0].CA_CTRL, (_HAL_REG32_R(&_TspCtrl[0].CA_CTRL) & ~TSP_CA0_CTRL_MASK) | (u3… in HAL_TSP_CSA_Set_ScrmPath()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/mmfi/ |
| H A D | halMMFilein.c | 133 static MS_U32 _HAL_REG32_R(REG32_M *reg) in _HAL_REG32_R() function
173 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
184 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
194 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
208 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
229 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_FILEIN_CTRL_MASK) | u32ctrl; in HAL_MMFI_AU_Set_Filein_Ctrl()
235 return (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_AU_Get_Filein_Ctrl()
242 …u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_TIMER_MASK) | ((MS_U32)(u8timer & 0xFF)… in HAL_MMFI_AU_Set_FileinTimer()
248 …MS_U32 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_WR_CNT_MASK) >> MMFI_CMQ_STAT… in HAL_MMFI_AU_CmdQ_FIFO_Get_WRCnt()
255 return (MS_BOOL)(_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_STATUS_FIFO_FULL); in HAL_MMFI_AU_CmdQ_FIFO_IsFull()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/messi/mmfi/ |
| H A D | halMMFilein.c | 141 static MS_U32 _HAL_REG32_R(REG32_M *reg) in _HAL_REG32_R() function
181 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
192 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
202 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
216 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
237 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_FILEIN_CTRL_MASK) | u32ctrl; in HAL_MMFI_AU_Set_Filein_Ctrl()
243 return (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_AU_Get_Filein_Ctrl()
250 …u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_TIMER_MASK) | ((MS_U32)(u8timer & 0xFF)… in HAL_MMFI_AU_Set_FileinTimer()
256 …MS_U32 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_WR_CNT_MASK) >> MMFI_CMQ_STAT… in HAL_MMFI_AU_CmdQ_FIFO_Get_WRCnt()
263 return (MS_BOOL)(_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_STATUS_FIFO_FULL); in HAL_MMFI_AU_CmdQ_FIFO_IsFull()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/mmfi/ |
| H A D | halMMFilein.c | 141 static MS_U32 _HAL_REG32_R(REG32_M *reg) in _HAL_REG32_R() function
181 u32data |=(_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_Set()
192 u32data |= (_HAL_REG32_R(&_MFCtrl_AU->PidFlt) & ~u32mask); in HAL_MMFI_AudPidFlt_SetPid()
202 u32data = _HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask; in HAL_MMFI_AudPidFlt_Enable()
216 u32data = (_HAL_REG32_R(&(_MFCtrl_AU->PidFlt)) & ~u32mask) | in HAL_MMFI_AudPidFlt_Reset()
237 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_FILEIN_CTRL_MASK) | u32ctrl; in HAL_MMFI_AU_Set_Filein_Ctrl()
243 return (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_FILEIN_CTRL_MASK); in HAL_MMFI_AU_Get_Filein_Ctrl()
250 …u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & ~MMFI_TIMER_MASK) | ((MS_U32)(u8timer & 0xFF)… in HAL_MMFI_AU_Set_FileinTimer()
256 …MS_U32 u32data = (_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_WR_CNT_MASK) >> MMFI_CMQ_STAT… in HAL_MMFI_AU_CmdQ_FIFO_Get_WRCnt()
263 return (MS_BOOL)(_HAL_REG32_R(&_MFCtrl_AU->Ctrl_CmdQSts) & MMFI_CMQ_STATUS_FIFO_FULL); in HAL_MMFI_AU_CmdQ_FIFO_IsFull()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/mmfi/ |
| H A D | halMMFilein.c | 131 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
186 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
204 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
266 u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)); in HAL_MMFI_Get_Filein_WriteAddr()
296 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
300 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
311 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
339 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
394 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
402 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/mmfi/ |
| H A D | halMMFilein.c | 132 static MS_U32 _HAL_REG32_R(REG32_MM *reg) in _HAL_REG32_R() function
166 …u32data = (_HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
174 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
239 u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)); in HAL_MMFI_Get_Filein_WriteAddr()
269 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
273 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
284 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
311 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
366 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
374 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/mmfi/ |
| H A D | halMMFilein.c | 147 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
217 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
235 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
298 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
328 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
332 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
343 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
371 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
426 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
434 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/mmfi/ |
| H A D | halMMFilein.c | 133 static MS_U32 _HAL_REG32_R(REG32_MM *reg) in _HAL_REG32_R() function
167 …u32data = (_HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
181 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
250 u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)); in HAL_MMFI_Get_Filein_WriteAddr()
280 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
284 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
295 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
344 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
399 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
407 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/mmfi/ |
| H A D | halMMFilein.c | 149 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
219 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
237 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
300 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
330 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
345 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
373 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
430 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
438 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/mmfi/ |
| H A D | halMMFilein.c | 153 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
223 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
241 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
304 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
338 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
349 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
377 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
434 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
442 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/mmfi/ |
| H A D | halMMFilein.c | 153 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
223 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
241 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
304 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
338 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
349 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
377 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
434 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
442 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/mmfi/ |
| H A D | halMMFilein.c | 133 static MS_U32 _HAL_REG32_R(REG32_MM *reg) in _HAL_REG32_R() function
167 …u32data = (_HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
181 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
250 u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)); in HAL_MMFI_Get_Filein_WriteAddr()
280 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
284 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
295 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
344 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
447 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
455 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/mmfi/ |
| H A D | halMMFilein.c | 153 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
223 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
241 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
304 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
338 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
349 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
377 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
434 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
442 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/mmfi/ |
| H A D | halMMFilein.c | 133 static MS_U32 _HAL_REG32_R(REG32_MM *reg) in _HAL_REG32_R() function
167 …u32data = (_HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_PID_MASK) | (MS_U32)u16PID; in HAL_MMFI_PidFlt_SetPid()
181 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].PidFlt[u8Idx])) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
250 u32addr = _HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)); in HAL_MMFI_Get_Filein_WriteAddr()
280 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
284 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
295 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
344 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
447 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
455 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/mmfi/ |
| H A D | halMMFilein.c | 153 static MS_U32 _HAL_REG32_R(REG32 *reg) in _HAL_REG32_R() function
223 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL); in HAL_MMFI_PidFlt_SetPid()
241 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK; in HAL_MMFI_PidFlt_Enable()
304 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng]; in HAL_MMFI_Get_Filein_WriteAddr()
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem)); in HAL_MMFI_Cfg_Enable()
338 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem)); in HAL_MMFI_Cfg_Enable()
349 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg))); in HAL_MMFI_Cfg_Get()
377 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader)); in HAL_MMFI_Get_TsHeaderInfo()
434 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf)); in HAL_MMFI_LPcr2_Get()
442 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn)); in HAL_MMFI_TimeStamp_Get()
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